[Bug binutils/10288] New: "objdump -D --target=binary -m arm7tdmi" shows non-ARM7TDMI instructions

------- Additional Comments From chris at seberino dot org  2009-07-11 06:37 -------

I think all of the following are wrong.  This "ror" part of addressing mode 1 must
be instructions like 0x0000007Z for Z=0,1,2,3, ...

*not* 0x000000fZ. <--- notice the "f".


<      3c0: 000000f0 andeq r0, r0, r0, ror r0
<      3c4: 000000f1 andeq r0, r0, r1, ror r0
<      3c8: 000000f2 andeq r0, r0, r2, ror r0
<      3cc: 000000f3 andeq r0, r0, r3, ror r0
<      3d0: 000000f4 andeq r0, r0, r4, ror r0
<      3d4: 000000f5 andeq r0, r0, r5, ror r0
<      3d8: 000000f6 andeq r0, r0, r6, ror r0
<      3dc: 000000f7 andeq r0, r0, r7, ror r0
<      3e0: 000000f8 andeq r0, r0, r8, ror r0
<      3e4: 000000f9 andeq r0, r0, r9, ror r0
<      3e8: 000000fa andeq r0, r0, sl, ror r0
<      3ec: 000000fb andeq r0, r0, fp, ror r0
<      3f0: 000000fc andeq r0, r0, ip, ror r0
<      3f4: 000000fd andeq r0, r0, sp, ror r0
<      3f8: 000000fe andeq r0, r0, lr, ror r0
<      3fc: 000000ff andeq r0, r0, pc, ror r0


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------- Additional Comments From cvs-commit at gcc dot gnu dot org  2009-07-14 14:17 -------
Subject: Bug 10288

CVSROOT: /cvs/src
Module name: src
Changes by: nickc@... 2009-07-14 14:16:35

Modified files:
        opcodes        : ChangeLog arm-dis.c

Log message:
        PR 10288
        * arm-dis.c (arm_opcodes): Catch illegal Addressing Mode 1
        patterns.
        (arm_decode_shift): Catch illegal register based shifts.
        (print_insn_arm): Properly handle negative register r0
        post-indexed addressing.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1417&r2=1.1418
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.103&r2=1.104



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------- Additional Comments From nickc at redhat dot com  2009-07-14 14:17 -------
Created an attachment (id=4052)
 --> (http://sourceware.org/bugzilla/attachment.cgi?id=4052&action=view)
Addressing mode fixes


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------- Additional Comments From nickc at redhat dot com  2009-07-14 14:20 -------
Hi Chris,

> My guess is there is some lag time between when your email notice arrives in
> my mailbox and the new tarballs get posted.

True - it is an automatic script that only runs once a day.  For faster access
to the changes I would recommend checking the sources out of the repository
using CVS.

> "000000b0 strheq r0, [r0], r0"

> *not* 0x000000dZ. <--- notice the "d".

These are both fixed with the latest patch (uploaded as pr10288.patch.5 and
checked into the repository).

Cheers
  Nick




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------- Additional Comments From chris at seberino dot org  2009-07-16 18:16 -------
Nick

Many bit regions in ARM instructions are specified as SBZ "Should Be Zero".

ARM docs say if these bits are NOT zero that the results are UNPREDICTABLE for
all ARM chips!

So the question is what is the best thing for objdump to do in these situations
where a bit region is not zeroed out when it should be.

I think the cleanest thing to do is to return UNDEFINED.  I found some incorrect
ldrsb's and ldrsh's that I think would best be interpreted as UNDEFINED instead....

Here are some examples. (These all have SBZ regions that aren't zeroed out)...
<    2fe40: 001001d0 ldrsbeq r0, [r0], -r0
<    2fe44: 001001d1 ldrsbeq r0, [r0], -r1
<    2fe48: 001001d2 ldrsbeq r0, [r0], -r2
<    2fe4c: 001001d3 ldrsbeq r0, [r0], -r3
<    2fe50: 001001d4 ldrsbeq r0, [r0], -r4
<    2fe54: 001001d5 ldrsbeq r0, [r0], -r5
<    2fe58: 001001d6 ldrsbeq r0, [r0], -r6
<    2fe5c: 001001d7 ldrsbeq r0, [r0], -r7
<    2fe60: 001001d8 ldrsbeq r0, [r0], -r8
<    2fe64: 001001d9 ldrsbeq r0, [r0], -r9

<    2fec0: 001001f0 ldrsheq r0, [r0], -r0
<    2fec4: 001001f1 ldrsheq r0, [r0], -r1
<    2fec8: 001001f2 ldrsheq r0, [r0], -r2
<    2fecc: 001001f3 ldrsheq r0, [r0], -r3
<    2fed0: 001001f4 ldrsheq r0, [r0], -r4
<    2fed4: 001001f5 ldrsheq r0, [r0], -r5
<    2fed8: 001001f6 ldrsheq r0, [r0], -r6

...etc.

Would it be hard for you to make these return UNDEFINED?

cs


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------- Additional Comments From chris at seberino dot org  2009-07-16 18:44 -------
Nick

If you think the SBZ issue isn't worth changing, or fine the way it is, that is
fine.  I'll move on.  I just wanted to make you aware of what I found.  That's all.

cs

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------- Additional Comments From cvs-commit at gcc dot gnu dot org  2009-07-20 12:11 -------
Subject: Bug 10288

CVSROOT: /cvs/src
Module name: src
Changes by: nickc@... 2009-07-20 12:11:18

Modified files:
        opcodes        : ChangeLog arm-dis.c

Log message:
        PR 10288
        * arm-dis.c (arm_opcodes): Catch non-zero bits 8-11 in register
        offset or indexed based addressing mode 3.

Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1418&r2=1.1419
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.104&r2=1.105



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------- Additional Comments From nickc at redhat dot com  2009-07-20 12:16 -------
Hi Chris,

  OK, I have checked in a patch to handle the SBZ field in addressing mode 3.

Cheers
  Nick


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------- Additional Comments From chris at seberino dot org  2009-08-04 17:03 -------
Nick

Would it be possible for me to take a few weeks break from our work on

http://sourceware.org/bugzilla/show_bug.cgi?id=10288

and come back to it?  Other things came up in the short term and these last few
bugs are a little trickier than the early more obvious ones.  I'd like to rest
for a bit doing other things and then come back.  I don't know if you want to
close this ticket for
now or leave it open until I return.

I just don't want you to think I'm bailing on this.

Chris



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