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[PATCH 1/6] sdhci: Enable cache snoopingThis patch enable cache snooping when the sdhc is initialized.
--- drivers/mmc/host/sdhci.c | 3 +++ drivers/mmc/host/sdhci.h | 4 ++++ 2 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 288e40b..cc6d45c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -178,6 +178,9 @@ static void sdhci_init(struct sdhci_host *host) { sdhci_reset(host, SDHCI_RESET_ALL); + /* Enable cache snooping */ + sdhci_writel(host, SDHCI_CACHE_SNOOP, SDHCI_HOST_DMA_CONTROL); + sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index afda7f1..9ee9622 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -176,6 +176,10 @@ #define SDHCI_SPEC_100 0 #define SDHCI_SPEC_200 1 +/* 40C DMA control register*/ +#define SDHCI_HOST_DMA_CONTROL 0x40C +#define SDHCI_CACHE_SNOOP 0x40 + struct sdhci_ops; struct sdhci_host { -- 1.6.4 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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[PATCH 2/6] P2020DS: Add sdhc support---
arch/powerpc/boot/dts/p2020ds.dts | 8 ++++++++ 1 files changed, 8 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts index 8c1c954..be449ba 100644 --- a/arch/powerpc/boot/dts/p2020ds.dts +++ b/arch/powerpc/boot/dts/p2020ds.dts @@ -454,6 +454,14 @@ phy-connection-type = "rgmii-id"; }; + sdhci@2e000 { + compatible = "fsl,p2020-esdhc", "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <72 0x2>; + interrupt-parent = <&mpic>; + clock-frequency = <0>; + }; + serial0: serial@4500 { cell-index = <0>; device_type = "serial"; -- 1.6.4 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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[PATCH 3/6] P2020DS: Fixup sdhc to use PIO modeThe SDHC can not work on DMA mode because of the hardware bug,
so we set a broken dma flag and use PIO mode. This patch applies to Rev1.0. --- arch/powerpc/boot/dts/p2020ds.dts | 1 + drivers/mmc/host/sdhci-of.c | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts index be449ba..574ad4f 100644 --- a/arch/powerpc/boot/dts/p2020ds.dts +++ b/arch/powerpc/boot/dts/p2020ds.dts @@ -459,6 +459,7 @@ reg = <0x2e000 0x1000>; interrupts = <72 0x2>; interrupt-parent = <&mpic>; + fsl,sdhci-dma-broken; clock-frequency = <0>; }; diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c index 01ab916..5879483 100644 --- a/drivers/mmc/host/sdhci-of.c +++ b/drivers/mmc/host/sdhci-of.c @@ -270,6 +270,9 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev, if (sdhci_of_wp_inverted(np)) host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT; + if (of_get_property(np, "fsl,sdhci-dma-broken", NULL)) + host->quirks |= SDHCI_QUIRK_BROKEN_DMA; + clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) of_host->clock = *clk; -- 1.6.4 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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[PATCH 4/6] sdhci: Fixup AHB2MAG IRQ bypass hardware workaroundThis patch implemnet the workaround that the bit
DCR[DMA__AHB2MAG_IRQ_BYPASS] cannot be set automatically when SoC reset. --- arch/powerpc/boot/dts/p2020ds.dts | 1 + drivers/mmc/host/sdhci-of.c | 5 ++++- drivers/mmc/host/sdhci.c | 8 ++++++++ drivers/mmc/host/sdhci.h | 3 +++ 4 files changed, 16 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts index 574ad4f..8b1056d 100644 --- a/arch/powerpc/boot/dts/p2020ds.dts +++ b/arch/powerpc/boot/dts/p2020ds.dts @@ -460,6 +460,7 @@ interrupts = <72 0x2>; interrupt-parent = <&mpic>; fsl,sdhci-dma-broken; + fsl,sdhci-ahb2mag-irq-bypass; clock-frequency = <0>; }; diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c index 5879483..0bc75b3 100644 --- a/drivers/mmc/host/sdhci-of.c +++ b/drivers/mmc/host/sdhci-of.c @@ -272,6 +272,9 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev, if (of_get_property(np, "fsl,sdhci-dma-broken", NULL)) host->quirks |= SDHCI_QUIRK_BROKEN_DMA; + + if (of_get_property(np, "fsl,sdhci-ahb2mag-irq-bypass", NULL)) + host->quirks |= SDHCI_QUIRK_SET_AHB2MAG_IRQ_BYPASS; clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index cc6d45c..711cbcd 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -176,11 +176,19 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) static void sdhci_init(struct sdhci_host *host) { + u32 ctrl; + sdhci_reset(host, SDHCI_RESET_ALL); /* Enable cache snooping */ sdhci_writel(host, SDHCI_CACHE_SNOOP, SDHCI_HOST_DMA_CONTROL); + if (host->quirks & SDHCI_QUIRK_SET_AHB2MAG_IRQ_BYPASS) { + ctrl = sdhci_readl(host, SDHCI_HOST_DMA_CONTROL); + ctrl |= SDHCI_AHB2MAG_IRQ_BYPASS; + sdhci_writel(host, ctrl, SDHCI_HOST_DMA_CONTROL); + } + sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 9ee9622..cb8beea 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -178,6 +178,7 @@ /* 40C DMA control register*/ #define SDHCI_HOST_DMA_CONTROL 0x40C +#define SDHCI_AHB2MAG_IRQ_BYPASS 0x20 #define SDHCI_CACHE_SNOOP 0x40 struct sdhci_ops; @@ -238,6 +239,8 @@ struct sdhci_host { #define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23) /* Controller uses SDCLK instead of TMCLK for data timeouts */ #define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24) +/* Controller cannot set DCR[DMA__AHB2MAG_IRQ_BYPASS] automatically*/ +#define SDHCI_QUIRK_SET_AHB2MAG_IRQ_BYPASS (1<<25) int irq; /* Device IRQ */ void __iomem * ioaddr; /* Mapped address */ -- 1.6.4 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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[PATCH 5/6] sdhci-of: Set the timeout to the max valueWhen access the card, the following error is reported:
mmc0: Got data interrupt 0x00000020 even though no data operation was in progress. mmc0: Got data interrupt 0x00000020 even though no data operation was in progress. so we skip the calculation of timeout and use the max value. --- arch/powerpc/boot/dts/p2020ds.dts | 1 + drivers/mmc/host/sdhci-of.c | 3 +++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts index 8b1056d..29989fb 100644 --- a/arch/powerpc/boot/dts/p2020ds.dts +++ b/arch/powerpc/boot/dts/p2020ds.dts @@ -461,6 +461,7 @@ interrupt-parent = <&mpic>; fsl,sdhci-dma-broken; fsl,sdhci-ahb2mag-irq-bypass; + fsl,sdhci-adjust-timeout; clock-frequency = <0>; }; diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c index 0bc75b3..0ff95d8 100644 --- a/drivers/mmc/host/sdhci-of.c +++ b/drivers/mmc/host/sdhci-of.c @@ -276,6 +276,9 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev, if (of_get_property(np, "fsl,sdhci-ahb2mag-irq-bypass", NULL)) host->quirks |= SDHCI_QUIRK_SET_AHB2MAG_IRQ_BYPASS; + if (of_get_property(np, "fsl,sdhci-adjust-timeout", NULL)) + host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) of_host->clock = *clk; -- 1.6.4 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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[PATCH 6/6] P2020DS: Remove sdhci-dma-broken and sdhci-ahb2mag-irq-bypass propertiesThe SDHC on P2020DS board use DMA mode by default.
This patch remove the properties used in PIO mode. --- arch/powerpc/boot/dts/p2020ds.dts | 2 -- 1 files changed, 0 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts index 29989fb..3263397 100644 --- a/arch/powerpc/boot/dts/p2020ds.dts +++ b/arch/powerpc/boot/dts/p2020ds.dts @@ -459,8 +459,6 @@ reg = <0x2e000 0x1000>; interrupts = <72 0x2>; interrupt-parent = <&mpic>; - fsl,sdhci-dma-broken; - fsl,sdhci-ahb2mag-irq-bypass; fsl,sdhci-adjust-timeout; clock-frequency = <0>; }; -- 1.6.4 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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Re: [PATCH 1/6] sdhci: Enable cache snoopingOn Wed, Sep 23, 2009 at 05:08:07PM +0800, Gao Guanhua wrote:
> This patch enable cache snooping when the sdhc is initialized. > --- > drivers/mmc/host/sdhci.c | 3 +++ > drivers/mmc/host/sdhci.h | 4 ++++ > 2 files changed, 7 insertions(+), 0 deletions(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 288e40b..cc6d45c 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -178,6 +178,9 @@ static void sdhci_init(struct sdhci_host *host) > { > sdhci_reset(host, SDHCI_RESET_ALL); > > + /* Enable cache snooping */ > + sdhci_writel(host, SDHCI_CACHE_SNOOP, SDHCI_HOST_DMA_CONTROL); > + > sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, > SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | > SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | > diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h > index afda7f1..9ee9622 100644 > --- a/drivers/mmc/host/sdhci.h > +++ b/drivers/mmc/host/sdhci.h > @@ -176,6 +176,10 @@ > #define SDHCI_SPEC_100 0 > #define SDHCI_SPEC_200 1 > > +/* 40C DMA control register*/ > +#define SDHCI_HOST_DMA_CONTROL 0x40C SDHCI Specification doesn't mention this register, it isn't standard. Plus, we have this register and bit set already in sdhci-of.c: static int esdhc_enable_dma(struct sdhci_host *host) { setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP); return 0; } Do p2020 need this bit set for PIO mode too? Thanks, -- Anton Vorontsov email: cbouatmailru@... irc://irc.freenode.net/bd2 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO modeOn Wed, Sep 23, 2009 at 05:08:09PM +0800, Gao Guanhua wrote:
> The SDHC can not work on DMA mode because of the hardware bug, > so we set a broken dma flag and use PIO mode. This patch applies > to Rev1.0. Signed-off-by line is missing (in all patches). > --- > arch/powerpc/boot/dts/p2020ds.dts | 1 + > drivers/mmc/host/sdhci-of.c | 3 +++ > 2 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts > index be449ba..574ad4f 100644 > --- a/arch/powerpc/boot/dts/p2020ds.dts > +++ b/arch/powerpc/boot/dts/p2020ds.dts > @@ -459,6 +459,7 @@ > reg = <0x2e000 0x1000>; > interrupts = <72 0x2>; > interrupt-parent = <&mpic>; > + fsl,sdhci-dma-broken; You might want to update Documentation/powerpc/dts-bindings/fsl/esdhc.txt > clock-frequency = <0>; > }; > > diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c > index 01ab916..5879483 100644 > --- a/drivers/mmc/host/sdhci-of.c > +++ b/drivers/mmc/host/sdhci-of.c > @@ -270,6 +270,9 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev, > if (sdhci_of_wp_inverted(np)) > host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT; > > + if (of_get_property(np, "fsl,sdhci-dma-broken", NULL)) > + host->quirks |= SDHCI_QUIRK_BROKEN_DMA; > + > clk = of_get_property(np, "clock-frequency", &size); > if (clk && size == sizeof(*clk) && *clk) > of_host->clock = *clk; > -- > 1.6.4 Thanks, -- Anton Vorontsov email: cbouatmailru@... irc://irc.freenode.net/bd2 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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Re: [PATCH 6/6] P2020DS: Remove sdhci-dma-broken and sdhci-ahb2mag-irq-bypass propertiesOn Wed, Sep 23, 2009 at 05:08:12PM +0800, Gao Guanhua wrote:
> The SDHC on P2020DS board use DMA mode by default. > This patch remove the properties used in PIO mode. You just added the properties in 3/6 and 4/6, and now you instantly remove them? > --- > arch/powerpc/boot/dts/p2020ds.dts | 2 -- > 1 files changed, 0 insertions(+), 2 deletions(-) > > diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts > index 29989fb..3263397 100644 > --- a/arch/powerpc/boot/dts/p2020ds.dts > +++ b/arch/powerpc/boot/dts/p2020ds.dts > @@ -459,8 +459,6 @@ > reg = <0x2e000 0x1000>; > interrupts = <72 0x2>; > interrupt-parent = <&mpic>; > - fsl,sdhci-dma-broken; > - fsl,sdhci-ahb2mag-irq-bypass; > fsl,sdhci-adjust-timeout; > clock-frequency = <0>; > }; > -- > 1.6.4 -- Anton Vorontsov email: cbouatmailru@... irc://irc.freenode.net/bd2 _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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RE: [PATCH 6/6] P2020DS: Remove sdhci-dma-broken and sdhci-ahb2mag-irq-bypass properties> -----Original Message----- > From: Anton Vorontsov [mailto:avorontsov@...] > Sent: Wednesday, September 23, 2009 8:00 PM > To: Gao Guanhua-B22826 > Cc: sdhci-devel@...; linuxppc-dev@... > Subject: Re: [PATCH 6/6] P2020DS: Remove sdhci-dma-broken and > sdhci-ahb2mag-irq-bypass properties > > On Wed, Sep 23, 2009 at 05:08:12PM +0800, Gao Guanhua wrote: > > The SDHC on P2020DS board use DMA mode by default. > > This patch remove the properties used in PIO mode. > > You just added the properties in 3/6 and 4/6, and now you > instantly remove them? Add them to support the PIO mode, the board has a hardware bug, sdhc can only work in PIO mode. Then the bug has been fixed. So remove those properties. Yes, maybe I shouldnot add the property in the dts, and only support PIO in driver. Thanks. > > > --- > > arch/powerpc/boot/dts/p2020ds.dts | 2 -- > > 1 files changed, 0 insertions(+), 2 deletions(-) > > > > diff --git a/arch/powerpc/boot/dts/p2020ds.dts > > b/arch/powerpc/boot/dts/p2020ds.dts > > index 29989fb..3263397 100644 > > --- a/arch/powerpc/boot/dts/p2020ds.dts > > +++ b/arch/powerpc/boot/dts/p2020ds.dts > > @@ -459,8 +459,6 @@ > > reg = <0x2e000 0x1000>; > > interrupts = <72 0x2>; > > interrupt-parent = <&mpic>; > > - fsl,sdhci-dma-broken; > > - fsl,sdhci-ahb2mag-irq-bypass; > > fsl,sdhci-adjust-timeout; > > clock-frequency = <0>; > > }; > > -- > > 1.6.4 > > -- > Anton Vorontsov > email: cbouatmailru@... > irc://irc.freenode.net/bd2 > > Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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RE: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO modeThanks, I will add them.
> -----Original Message----- > From: Anton Vorontsov [mailto:avorontsov@...] > Sent: Wednesday, September 23, 2009 7:55 PM > To: Gao Guanhua-B22826 > Cc: sdhci-devel@...; linuxppc-dev@... > Subject: Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO mode > > On Wed, Sep 23, 2009 at 05:08:09PM +0800, Gao Guanhua wrote: > > The SDHC can not work on DMA mode because of the hardware > bug, so we > > set a broken dma flag and use PIO mode. This patch applies > to Rev1.0. > > Signed-off-by line is missing (in all patches). > > > --- > > arch/powerpc/boot/dts/p2020ds.dts | 1 + > > drivers/mmc/host/sdhci-of.c | 3 +++ > > 2 files changed, 4 insertions(+), 0 deletions(-) > > > > diff --git a/arch/powerpc/boot/dts/p2020ds.dts > > b/arch/powerpc/boot/dts/p2020ds.dts > > index be449ba..574ad4f 100644 > > --- a/arch/powerpc/boot/dts/p2020ds.dts > > +++ b/arch/powerpc/boot/dts/p2020ds.dts > > @@ -459,6 +459,7 @@ > > reg = <0x2e000 0x1000>; > > interrupts = <72 0x2>; > > interrupt-parent = <&mpic>; > > + fsl,sdhci-dma-broken; > > You might want to update > Documentation/powerpc/dts-bindings/fsl/esdhc.txt > > > clock-frequency = <0>; > > }; > > > > diff --git a/drivers/mmc/host/sdhci-of.c > b/drivers/mmc/host/sdhci-of.c > > index 01ab916..5879483 100644 > > --- a/drivers/mmc/host/sdhci-of.c > > +++ b/drivers/mmc/host/sdhci-of.c > > @@ -270,6 +270,9 @@ static int __devinit > sdhci_of_probe(struct of_device *ofdev, > > if (sdhci_of_wp_inverted(np)) > > host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT; > > > > + if (of_get_property(np, "fsl,sdhci-dma-broken", NULL)) > > + host->quirks |= SDHCI_QUIRK_BROKEN_DMA; > > + > > clk = of_get_property(np, "clock-frequency", &size); > > if (clk && size == sizeof(*clk) && *clk) > > of_host->clock = *clk; > > -- > > 1.6.4 > > Thanks, > > -- > Anton Vorontsov > email: cbouatmailru@... > irc://irc.freenode.net/bd2 > > Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO modeOn Sep 24, 2009, at 3:28 AM, Gao Guanhua-B22826 wrote: > Thanks, I will add them. > >> -----Original Message----- >> From: Anton Vorontsov [mailto:avorontsov@...] >> Sent: Wednesday, September 23, 2009 7:55 PM >> To: Gao Guanhua-B22826 >> Cc: sdhci-devel@...; linuxppc-dev@... >> Subject: Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO mode >> >> On Wed, Sep 23, 2009 at 05:08:09PM +0800, Gao Guanhua wrote: >>> The SDHC can not work on DMA mode because of the hardware >> bug, so we >>> set a broken dma flag and use PIO mode. This patch applies >> to Rev1.0. >> >> Signed-off-by line is missing (in all patches). > Any plan to update & repost these patches? - k _______________________________________________ Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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RE: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO modeI will update the patch next week.
Regards, --gaoguanhua > -----Original Message----- > From: Kumar Gala [mailto:galak@...] > Sent: Thursday, November 05, 2009 9:52 PM > To: Gao Guanhua-B22826 > Cc: avorontsov@...; linuxppc-dev@...; > sdhci-devel@... > Subject: Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO mode > > > On Sep 24, 2009, at 3:28 AM, Gao Guanhua-B22826 wrote: > > > Thanks, I will add them. > > > >> -----Original Message----- > >> From: Anton Vorontsov [mailto:avorontsov@...] > >> Sent: Wednesday, September 23, 2009 7:55 PM > >> To: Gao Guanhua-B22826 > >> Cc: sdhci-devel@...; linuxppc-dev@... > >> Subject: Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO mode > >> > >> On Wed, Sep 23, 2009 at 05:08:09PM +0800, Gao Guanhua wrote: > >>> The SDHC can not work on DMA mode because of the hardware > >> bug, so we > >>> set a broken dma flag and use PIO mode. This patch applies > >> to Rev1.0. > >> > >> Signed-off-by line is missing (in all patches). > > > > Any plan to update & repost these patches? > > - k > > Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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RE: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO modeHi, Kumar,
I tried to update the patch based on the latest kernel tree (2.6.32-rc6), there are some problems: 1) the P2020DS board has supported SDHC using DMA, and the latest kernel tree has included the related code, it doesn't need most of the patches I posted before. 2) I compiled the image, but the SDHC can not work, it reports error -110. I adjusted the timeout to the max value, but anther error occurred. > -----Original Message----- > From: Kumar Gala [mailto:galak@...] > Sent: Thursday, November 05, 2009 9:52 PM > To: Gao Guanhua-B22826 > Cc: avorontsov@...; linuxppc-dev@...; > sdhci-devel@... > Subject: Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO mode > > > On Sep 24, 2009, at 3:28 AM, Gao Guanhua-B22826 wrote: > > > Thanks, I will add them. > > > >> -----Original Message----- > >> From: Anton Vorontsov [mailto:avorontsov@...] > >> Sent: Wednesday, September 23, 2009 7:55 PM > >> To: Gao Guanhua-B22826 > >> Cc: sdhci-devel@...; linuxppc-dev@... > >> Subject: Re: [PATCH 3/6] P2020DS: Fixup sdhc to use PIO mode > >> > >> On Wed, Sep 23, 2009 at 05:08:09PM +0800, Gao Guanhua wrote: > >>> The SDHC can not work on DMA mode because of the hardware > >> bug, so we > >>> set a broken dma flag and use PIO mode. This patch applies > >> to Rev1.0. > >> > >> Signed-off-by line is missing (in all patches). > > > > Any plan to update & repost these patches? > > - k > > Linuxppc-dev mailing list Linuxppc-dev@... https://lists.ozlabs.org/listinfo/linuxppc-dev |
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