Linux x uClinux for ColdFires: what is the best for what?

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Re: Linux x uClinux for ColdFires: what is the best for what?

by Bob Furber :: Rate this Message:

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David Brown wrote:

>> That's not to say there aren't customers who are space constrained and
>> asking for smaller packages, though.  There just aren't that many of
>> them yet.
>
> I agree with that.  To build cards using 0.8 mm BGA, and correspondingly
> small chicken feed components, you need a much more expensive class of
> board production machine, putting the cards out of reach of smaller
> production companies.  

I am sorry, although this perception is quite common, it is incorrect.
If it is within our reach, it is within anybody's reach. We can get a
fine pitch prototype board run for under $300 and we can get 4 to 6 of
these protos (with 0.8mm bga flash and DDR ram plus a mess of discretes
and a few support chips assembled for the cost of a stencil ($500) +
$800. Not the budget of a low end hobbyist, but certainly within the
reach of the smallest company.

It would be a shame for FSL to lag because of incorrect perceptions,
even if they are shared by many of its clients. I would prefer to see
FSL develop more cutting-edge products supported by app-notes with
escaping and assembly tips to educate their more conservative clients.

> :
> I can see the difficulties in integrating a PHY (Ethernet or USB) on
> chip - different chip processes are optimal for different sorts of
> device.  There are also occasions when you would actively prefer a MII
> interface (such as for connecting to a switch chip).  But the big
> advantage for customers is that with a PHY on chip, you only have four
> lines for Ethernet, connected directly to a socket with magnetics -
> without the PHY, you have about 15 lines and an extra chip on the board.
>  With GbE, 480 MBit USB, and other faster peripherals, it's even worse
> as you are routing a fair number of parallel fast signals rather than
> just two differential pairs.

You bring up some excellent points. And it is more than an extra 11
lines. Adding that $1.80 Phy chip and half a dozen decoupling caps adds
realestate for these parts and at least 50 additional traces. This has a
significant impact on cost, size, EMI and signal quality. Depending on
volume, it can cost in the order of $0.10 per part (i.e., a tiny smd
cap) just to place it. And there is the extra board size. All of which
translates to about 2 to 3 times the cost of the raw parts. In short,
the off-chip phy ends up adding about $3 to $5 to the cost the finished
product.

And, even though we hate to admit it, we all make mistakes. 1 in 100? 1
in 1000? 1 in 10,000? The point is, the fewer signals and the fewer
parts on a product, the smaller the chance of an error; an error that
will cost time and money to locate and fix.

What I hear is that there are technical challenges to adding a Phy to a
chip and this translate to higher costs. Perhaps FSL marketing is trying
to compete on MPU cost. Personally, I would rather pay more for a nicely
integrated MPU if it results in a reduction of the final product cost,
size and power. And, this would apply to the power supplies too. For
instance, the National DP83848 Phy generates an internal voltage
on-chip. Flash chips have been doing this for ages. Why not the MCFxxxx?

>> BTW, I reserve the right to backtrack on this for Gbit Ethernet.  
>> There's some commonality between a GbE PHY and things like PCIe and
>> SATA PHYs, which do get integrated, that might make this possible.  No
>> promises, just an observation.
>>> b. Having tasted eTPU and MIOS on the MPC5xx, I got addicted.
>>
>> eTPU...  We really have got the thumbscrews on you :-)
>>
>> John
>>
>
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Re: Linux x uClinux for ColdFires: what is the best for what?

by David Brown-4 :: Rate this Message:

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Bob Furber wrote:

> David Brown wrote:
>
>>> That's not to say there aren't customers who are space constrained
>>> and asking for smaller packages, though.  There just aren't that many
>>> of them yet.
>>
>> I agree with that.  To build cards using 0.8 mm BGA, and
>> correspondingly small chicken feed components, you need a much more
>> expensive class of board production machine, putting the cards out of
>> reach of smaller production companies.  
>
> I am sorry, although this perception is quite common, it is incorrect.
> If it is within our reach, it is within anybody's reach. We can get a
> fine pitch prototype board run for under $300 and we can get 4 to 6 of
> these protos (with 0.8mm bga flash and DDR ram plus a mess of discretes
> and a few support chips assembled for the cost of a stencil ($500) +
> $800. Not the budget of a low end hobbyist, but certainly within the
> reach of the smallest company.
>

I think you misunderstand me - my company does development and
production of electronics.  We don't make the actual printed circuit
board itself, but we populate and solder them, as well as mounting them
in boxes or whatever is required.  So for us there is little point in
designing a card that we cannot produce ourselves.  We'd need a new
pick-and-place machine to reliably handle 0.8 mm bgas and 0402 or even
smaller chicken feed (what's the point of having a small chip, if your
chicken feed takes lots of space anyway?).  I'm sure we'll get there one
day - but as the pitch goes down, the cost of the machines goes up.

> It would be a shame for FSL to lag because of incorrect perceptions,
> even if they are shared by many of its clients. I would prefer to see
> FSL develop more cutting-edge products supported by app-notes with
> escaping and assembly tips to educate their more conservative clients.
>
>>     :
>> I can see the difficulties in integrating a PHY (Ethernet or USB) on
>> chip - different chip processes are optimal for different sorts of
>> device.  There are also occasions when you would actively prefer a MII
>> interface (such as for connecting to a switch chip).  But the big
>> advantage for customers is that with a PHY on chip, you only have four
>> lines for Ethernet, connected directly to a socket with magnetics -
>> without the PHY, you have about 15 lines and an extra chip on the
>> board.  With GbE, 480 MBit USB, and other faster peripherals, it's
>> even worse as you are routing a fair number of parallel fast signals
>> rather than just two differential pairs.
>
> You bring up some excellent points. And it is more than an extra 11
> lines. Adding that $1.80 Phy chip and half a dozen decoupling caps adds
> realestate for these parts and at least 50 additional traces. This has a
> significant impact on cost, size, EMI and signal quality. Depending on
> volume, it can cost in the order of $0.10 per part (i.e., a tiny smd
> cap) just to place it. And there is the extra board size. All of which
> translates to about 2 to 3 times the cost of the raw parts. In short,
> the off-chip phy ends up adding about $3 to $5 to the cost the finished
> product.
>
> And, even though we hate to admit it, we all make mistakes. 1 in 100? 1
> in 1000? 1 in 10,000? The point is, the fewer signals and the fewer
> parts on a product, the smaller the chance of an error; an error that
> will cost time and money to locate and fix.
>
> What I hear is that there are technical challenges to adding a Phy to a
> chip and this translate to higher costs. Perhaps FSL marketing is trying
> to compete on MPU cost. Personally, I would rather pay more for a nicely
> integrated MPU if it results in a reduction of the final product cost,
> size and power. And, this would apply to the power supplies too. For
> instance, the National DP83848 Phy generates an internal voltage
> on-chip. Flash chips have been doing this for ages. Why not the MCFxxxx?
>

As I understand it, there is a little more involved here.  When you are
designing a chip, you make decisions about the stackup - the number of
layers, the materials for the layers, the type of doping, the track
widths, and so on.  Different types of components are best suited to
different setups, and some component types and stacks have particular
limitations.  Thus if you have a stack suited for high-speed digital
logic, it is possible to put flash on the same chip, but it costs a lot
more per bit than on a flash-optimised stack.  If you have a chip with
small geometry, you can't (practically speaking) put 5V logic on the
same device - thus faster MCUs are 3.3V even though customers would
often like the flexibility to use 5V.  And the sort of circuits needed
for a fast PHY don't fit well with those needed for a processor.  I
would very much like integrated PHYs - and I'd be willing to pay for
them, for the same reasons you would.  I understand why PHYs are seldom
integrated - although I'd prefer if they were on the device.

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Re: Linux x uClinux for ColdFires: what is the best for what?

by Ricardo Raupp :: Rate this Message:

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Guys
Thanks for your high level comments about my post.
It is very helpful for me.
John...definitely: you are a 64bits  answering machine !!! :):)
I still hope to see you at FTF / 2008.
BTW: If you don´t mind, could someone  do more comments about the "initial"
question of this post?
I confess I could not build a real idea about it yet...
Thanks all of you !!
Ricardo Raupp


----- Original Message -----
From: "David Brown" <david@...>
To: "Ricardo" <ricardo@...>
Sent: Monday, May 05, 2008 4:48 PM
Subject: Re: [ColdFire] Linux x uClinux for ColdFires: what is the best for
what?


> Bob Furber wrote:
>> David Brown wrote:
>>
>>>> That's not to say there aren't customers who are space constrained and
>>>> asking for smaller packages, though.  There just aren't that many of
>>>> them yet.
>>>
>>> I agree with that.  To build cards using 0.8 mm BGA, and correspondingly
>>> small chicken feed components, you need a much more expensive class of
>>> board production machine, putting the cards out of reach of smaller
>>> production companies.
>>
>> I am sorry, although this perception is quite common, it is incorrect. If
>> it is within our reach, it is within anybody's reach. We can get a fine
>> pitch prototype board run for under $300 and we can get 4 to 6 of these
>> protos (with 0.8mm bga flash and DDR ram plus a mess of discretes and a
>> few support chips assembled for the cost of a stencil ($500) + $800. Not
>> the budget of a low end hobbyist, but certainly within the reach of the
>> smallest company.
>>
>
> I think you misunderstand me - my company does development and production
> of electronics.  We don't make the actual printed circuit board itself,
> but we populate and solder them, as well as mounting them in boxes or
> whatever is required.  So for us there is little point in designing a card
> that we cannot produce ourselves.  We'd need a new pick-and-place machine
> to reliably handle 0.8 mm bgas and 0402 or even smaller chicken feed
> (what's the point of having a small chip, if your chicken feed takes lots
> of space anyway?).  I'm sure we'll get there one day - but as the pitch
> goes down, the cost of the machines goes up.
>
>> It would be a shame for FSL to lag because of incorrect perceptions, even
>> if they are shared by many of its clients. I would prefer to see FSL
>> develop more cutting-edge products supported by app-notes with escaping
>> and assembly tips to educate their more conservative clients.
>>
>>>     :
>>> I can see the difficulties in integrating a PHY (Ethernet or USB) on
>>> chip - different chip processes are optimal for different sorts of
>>> device.  There are also occasions when you would actively prefer a MII
>>> interface (such as for connecting to a switch chip).  But the big
>>> advantage for customers is that with a PHY on chip, you only have four
>>> lines for Ethernet, connected directly to a socket with magnetics -
>>> without the PHY, you have about 15 lines and an extra chip on the board.
>>> With GbE, 480 MBit USB, and other faster peripherals, it's even worse as
>>> you are routing a fair number of parallel fast signals rather than just
>>> two differential pairs.
>>
>> You bring up some excellent points. And it is more than an extra 11
>> lines. Adding that $1.80 Phy chip and half a dozen decoupling caps adds
>> realestate for these parts and at least 50 additional traces. This has a
>> significant impact on cost, size, EMI and signal quality. Depending on
>> volume, it can cost in the order of $0.10 per part (i.e., a tiny smd cap)
>> just to place it. And there is the extra board size. All of which
>> translates to about 2 to 3 times the cost of the raw parts. In short, the
>> off-chip phy ends up adding about $3 to $5 to the cost the finished
>> product.
>>
>> And, even though we hate to admit it, we all make mistakes. 1 in 100? 1
>> in 1000? 1 in 10,000? The point is, the fewer signals and the fewer parts
>> on a product, the smaller the chance of an error; an error that will cost
>> time and money to locate and fix.
>>
>> What I hear is that there are technical challenges to adding a Phy to a
>> chip and this translate to higher costs. Perhaps FSL marketing is trying
>> to compete on MPU cost. Personally, I would rather pay more for a nicely
>> integrated MPU if it results in a reduction of the final product cost,
>> size and power. And, this would apply to the power supplies too. For
>> instance, the National DP83848 Phy generates an internal voltage on-chip.
>> Flash chips have been doing this for ages. Why not the MCFxxxx?
>>
>
> As I understand it, there is a little more involved here.  When you are
> designing a chip, you make decisions about the stackup - the number of
> layers, the materials for the layers, the type of doping, the track
> widths, and so on.  Different types of components are best suited to
> different setups, and some component types and stacks have particular
> limitations.  Thus if you have a stack suited for high-speed digital
> logic, it is possible to put flash on the same chip, but it costs a lot
> more per bit than on a flash-optimised stack.  If you have a chip with
> small geometry, you can't (practically speaking) put 5V logic on the same
> device - thus faster MCUs are 3.3V even though customers would often like
> the flexibility to use 5V.  And the sort of circuits needed for a fast PHY
> don't fit well with those needed for a processor.  I would very much like
> integrated PHYs - and I'd be willing to pay for them, for the same reasons
> you would.  I understand why PHYs are seldom integrated - although I'd
> prefer if they were on the device.
>
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How to access a ethernet device behind a ADSL modem?

by Ricardo Raupp :: Rate this Message:

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Hi Folks
I developped a board with ethernet and some relays to home automation.
Till now, I know that the only way to connect with this board is:
- know the modem IP
- set a Port Forwarding (NAT?) feature in the modem web browser.
Well, ok...
But, imagine the modem has been replaced by a new one....the NAT settings
disappeared !!therefore the board is now unreachable!
I read about a  protocol (?) / feature(?) called uPnP : Universal Plug and
Play and I understood the
own device connected to a switch could ask for Port Fowarfing.
It is a very important feature for people who wants to connect devices wich
are behind switchers / modensa etc..

Has anyone done it?

Will it be what MSN and others do to be able to receive external
connections?

Ricardo Raupp


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Re: How to access a ethernet device behind a ADSL modem?

by David Brown-4 :: Rate this Message:

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Ricardo Raupp wrote:

> Hi Folks
> I developped a board with ethernet and some relays to home automation.
> Till now, I know that the only way to connect with this board is:
> - know the modem IP
> - set a Port Forwarding (NAT?) feature in the modem web browser.
> Well, ok...
> But, imagine the modem has been replaced by a new one....the NAT
> settings disappeared !!therefore the board is now unreachable!
> I read about a  protocol (?) / feature(?) called uPnP : Universal Plug
> and Play and I understood the
> own device connected to a switch could ask for Port Fowarfing.
> It is a very important feature for people who wants to connect devices
> wich are behind switchers / modensa etc..
>
> Has anyone done it?
>
> Will it be what MSN and others do to be able to receive external
> connections?
>

uPnP is certainly a way for devices to ask a router to enable port
forwarding.  However, not every NAT router supports it, and many have it
disabled (either by default, or intentionally by the user).  It is an
insanely insecure concept which allows any software or hardware to
bypass your firewall.  It's a typical MS idea - in order to make it as
easy as possible for legitimate software or hardware to open incoming
connections (a laudable aim in itself), you allow *any* software or
hardware to open incoming connections.

Even if you use uPnP to open connections (or ask users to manually
configure a port forward), you also have to consider how you are going
to find the modem's IP - try a dynamic dns service.

An alternative is for the board to initiate contact - it could regularly
contact a server somewhere looking for new orders.  That way you have no
issues regarding connectivity or addressing.  Remember also that there
is no need for this communication to follow web-style request then
immediate answer - your board could open a connection and leave it open.
  The server can then send commands as and when it wants to (such as in
response to the user connecting to a web interface on the server).  The
only two disadvantages here are that open connections require some
resources on your server, which could be an issue if you have many
thousands of boards installed (consider regular polling, and only hold
the connection open if it is needed), and that the user's Internet
connection must be open all the time (not a problem for most people).

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Re: How to access a ethernet device behind a ADSL modem?

by Ricardo Raupp :: Rate this Message:

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----- Original Message -----
From: "David Brown" <david@...>
To: "Ricardo" <ricardo@...>
Sent: Monday, October 27, 2008 7:37 AM
Subject: Re: [ColdFire] How to access a ethernet device behind a ADSL modem?

> Ricardo Raupp wrote:
>> Hi Folks
>> I developped a board with ethernet and some relays to home automation.
>> Till now, I know that the only way to connect with this board is:
>> - know the modem IP
>> - set a Port Forwarding (NAT?) feature in the modem web browser.
>> Well, ok...
>> But, imagine the modem has been replaced by a new one....the NAT settings
>> disappeared !!therefore the board is now unreachable!
>> I read about a  protocol (?) / feature(?) called uPnP : Universal Plug
>> and Play and I understood the
>> own device connected to a switch could ask for Port Fowarfing.
>> It is a very important feature for people who wants to connect devices
>> wich are behind switchers / modensa etc..
>>
>> Has anyone done it?
>>
>> Will it be what MSN and others do to be able to receive external
>> connections?
>>
>
> uPnP is certainly a way for devices to ask a router to enable port
> forwarding.  However, not every NAT router supports it, and many have it
> disabled (either by default, or intentionally by the user).  It is an
> insanely insecure concept which allows any software or hardware to bypass
> your firewall.  It's a typical MS idea - in order to make it as easy as
> possible for legitimate software or hardware to open incoming connections
> (a laudable aim in itself), you allow *any* software or hardware to open
> incoming connections.
>
> Even if you use uPnP to open connections (or ask users to manually
> configure a port forward), you also have to consider how you are going to
> find the modem's IP - try a dynamic dns service.
>
> An alternative is for the board to initiate contact - it could regularly
> contact a server somewhere looking for new orders.  That way you have no
> issues regarding connectivity or addressing.  Remember also that there is
> no need for this communication to follow web-style request then immediate
> answer - your board could open a connection and leave it open. The server
> can then send commands as and when it wants to (such as in response to the
> user connecting to a web interface on the server).  The only two
> disadvantages here are that open connections require some resources on
> your server, which could be an issue if you have many thousands of boards
> installed (consider regular polling, and only hold the connection open if
> it is needed), and that the user's Internet connection must be open all
> the time (not a problem for most people).
>

Thanks for your points David
In fact such procedure has the power to help and to "crash" at same sime.
I tried it in some modems and it worked at first time.
In a more sophisticated one I needed to enable de uPNP feature.
Currently I´m using pooling server approaching....works perfectly, despite I
loose real time action from server to device....I built a commands queue
scheme into server...
Thanks !
Ricardo Raupp


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