Minimal configuration for Spartan-3E Starter Kit board

[Serge Vakulenko]

Hello,

I developed a minimal configuration of OR1K for Spartan-3E Starter Kit
board. Hello-uart is running fine. You can download the sources and
BIT image from here: http://vak.ru/pub/fpga/s3esk-openrisc.tgz

The configuration contains OpenRISC 1200 and a limited set of
OpenCores peripherals: UART16550, debug interface, and 16 kbytes of
internal FPGA block RAM.

Data/instruction caches, MMU and are disabled (lack of BlockRAMs).
Multiply-Accumulate instruction is also disabled (it takes 6% of slices).
The clock is decreased to 5MHz. Probably I was too pessimistic here...

To recompile the system from sources, you need Xilinx ISE Webpack
Linux version to be installed. Just run:

        make

and all the synthesis passes will be executed in order (xst, ngdbuild,
map, par, trce, bitgen) resulting in "or1k-mini.bit" file.

Device utilization summary:
Selected Device : 3s500efg320-4

 Number of Slices:                    2734  out of   4656    58%
 Number of Slice Flip Flops:          1725  out of   9312    18%
 Number of 4 input LUTs:              5113  out of   9312    54%
    Number used as logic:             5081
    Number used as RAMs:                32
 Number of IOs:                          9
 Number of bonded IOBs:                  9  out of    232     3%
 Number of BRAMs:                       14  out of     20    70%
 Number of MULT18X18SIOs:                3  out of     20    15%
 Number of GCLKs:                        3  out of     24    12%
___
Regards,
Serge Vakulenko
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Patrick Pelgrims]

-----Oorspronkelijk bericht-----
Van: openrisc-bounces@...
[mailto:openrisc-bounces@...] Namens serge.vakulenko@...
Verzonden: vrijdag 22 december 2006 21:24
Aan: openrisc@...
Onderwerp: [openrisc] Minimal configuration for Spartan-3E Starter Kit
board


Hello,

I developed a minimal configuration of OR1K for Spartan-3E Starter Kit
board. Hello-uart is running fine. You can download the sources and BIT
image from here: http://vak.ru/pub/fpga/s3esk-openrisc.tgz

Can you verify the tgz file Serge because WinZip detects a header error
in your tgz file.


The configuration contains OpenRISC 1200 and a limited set of OpenCores
peripherals: UART16550, debug interface, and 16 kbytes of internal FPGA
block RAM.

Data/instruction caches, MMU and are disabled (lack of BlockRAMs).
Multiply-Accumulate instruction is also disabled (it takes 6% of
slices). The clock is decreased to 5MHz. Probably I was too pessimistic
here...

To recompile the system from sources, you need Xilinx ISE Webpack Linux
version to be installed. Just run:

        make

and all the synthesis passes will be executed in order (xst, ngdbuild,
map, par, trce, bitgen) resulting in "or1k-mini.bit" file.

Device utilization summary:
Selected Device : 3s500efg320-4

 Number of Slices:                    2734  out of   4656    58%
 Number of Slice Flip Flops:          1725  out of   9312    18%
 Number of 4 input LUTs:              5113  out of   9312    54%
    Number used as logic:             5081
    Number used as RAMs:                32
 Number of IOs:                          9
 Number of bonded IOBs:                  9  out of    232     3%
 Number of BRAMs:                       14  out of     20    70%
 Number of MULT18X18SIOs:                3  out of     20    15%
 Number of GCLKs:                        3  out of     24    12%

We will try out you work ;-)

Greatings

Patrick Pelgrims
___
Regards,
Serge Vakulenko
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Serge Vakulenko]

From: Patrick Pelgrims<patrick.pelgrims@p...>
> Can you verify the tgz file Serge because WinZip detects a header error
> in your tgz file.

Hmm... It opens fine by WinZip 8.1 on my computer. Probably, the file
was damaged while downloading?

I made a copy in ZIP format, so you could try it instead:
http://www.vak.ru/pub/fpga/s3esk-openrisc.zip

> We will try out you work ;-)

Thank you for great "Basic Custopm OpenRisc system" tutorials! :)
They helped me a lot.
___
Best wishes,
Serge
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Steve Fielding]

Hello Serge,
Serge many thanks for the Spartan3 starter project. For anyone that is interested I have created a small Perl script that will take a object file in hex format (you will need to use bin2hex to create the hex file), and create a file containing Xilinx INIT_xx statements. This can be included in the onchip_ram_top.v file between module/endmodule pair.
Steve


serge.vakulenko@... wrote:

Hello,

I developed a minimal configuration of OR1K for Spartan-3E Starter Kit
board. Hello-uart is running fine. You can download the sources and
BIT image from here: http://vak.ru/pub/fpga/s3esk-openrisc.tgz

The configuration contains OpenRISC 1200 and a limited set of
OpenCores peripherals: UART16550, debug interface, and 16 kbytes of
internal FPGA block RAM.

Data/instruction caches, MMU and are disabled (lack of BlockRAMs).
Multiply-Accumulate instruction is also disabled (it takes 6% of slices).
The clock is decreased to 5MHz. Probably I was too pessimistic here...

To recompile the system from sources, you need Xilinx ISE Webpack
Linux version to be installed. Just run:

make

and all the synthesis passes will be executed in order (xst, ngdbuild,
map, par, trce, bitgen) resulting in "or1k-mini.bit" file.

Device utilization summary:
Selected Device : 3s500efg320-4

Number of Slices: 2734 out of 4656 58%
Number of Slice Flip Flops: 1725 out of 9312 18%
Number of 4 input LUTs: 5113 out of 9312 54%
Number used as logic: 5081
Number used as RAMs: 32
Number of IOs: 9
Number of bonded IOBs: 9 out of 232 3%
Number of BRAMs: 14 out of 20 70%
Number of MULT18X18SIOs: 3 out of 20 15%
Number of GCLKs: 3 out of 24 12%
___
Regards,
Serge Vakulenko
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Steve Fielding
Base2Designs
4409 Capitol Court
Concord
94518-1933
CA
USA
Tel: [phone]
Fax: [phone]



_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Serge Vakulenko]

Thanx, Steve! Your hex-to-init script is very useful for creating bootloaders.
___
Best wishes,
Serge
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Steve Fielding]

Hi Serge,
I am trying to recompile hello.c, and I just cannot get the same hello.or32 file as the one you supplied with s3esk-openrisc. It appears that the linker is inserting about 20 long words starting at 0x0, which pushes the reset vector away from 0x100, the normal Openrisc reset entry point. I have tried -nostartfiles option but no success. The hello.dis file is not identical to yours, but it looks sort of OK. Any ideas?
Thanks,
Steve


Serge Vakulenko <serge.vakulenko@...> wrote:

Thanx, Steve! Your hex-to-init script is very useful for creating bootloaders.
___
Best wishes,
Serge
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Steve Fielding
Base2Designs
4409 Capitol Court
Concord
94518-1933
CA
USA
Tel: [phone]
Fax: [phone]


_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Steve Fielding]

Sorry, my mistake. My hello.or32 ELF file matched the original, but my hex file was incorrect because I forgot to use elf32-objcopy, before running bin2hex.

Steve Fielding <sfielding@...> wrote:

Hi Serge,
I am trying to recompile hello.c, and I just cannot get the same hello.or32 file as the one you supplied with s3esk-openrisc. It appears that the linker is inserting about 20 long words starting at 0x0, which pushes the reset vector away from 0x100, the normal Openrisc reset entry point. I have tried -nostartfiles option but no success. The hello.dis file is not identical to yours, but it looks sort of OK. Any ideas?
Thanks,
Steve


Serge Vakulenko <serge.vakulenko@...> wrote:

Thanx, Steve! Your hex-to-init script is very useful for creating bootloaders.
___
Best wishes,
Serge
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Steve Fielding
Base2Designs
4409 Capitol Court
Concord
94518-1933
CA
USA
Tel: [phone]
Fax: [phone]

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Eduardo Peters-2]

Hello!!!

Where I found the bin2hex file???

Thanks

On 7/11/07, Steve Fielding <sfielding@...> wrote:

>
> Sorry, my mistake. My hello.or32 ELF file matched the original, but my hex
> file was incorrect because I forgot to use elf32-objcopy, before running
> bin2hex.
>
>
> Steve Fielding <sfielding@...> wrote:
>  Hi Serge,
> I am trying to recompile hello.c, and I just cannot get the same hello.or32
> file as the one you supplied with s3esk-openrisc. It appears that the linker
> is inserting about 20 long words starting at 0x0, which pushes the reset
> vector away from 0x100, the normal Openrisc reset entry point. I have tried
> -nostartfiles option but no success. The hello.dis file is not identical to
> yours, but it looks sort of OK. Any ideas?
> Thanks,
> Steve
>
>
> Serge Vakulenko <serge.vakulenko@...> wrote:
>  Thanx, Steve! Your hex-to-init script is very useful for creating
> bootloaders.
> ___
> Best wishes,
> Serge
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
>
>
> Steve Fielding
> Base2Designs
> 4409 Capitol Court
> Concord
> 94518-1933
> CA
> USA
> Tel: [phone]
> Fax: [phone]
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>

--
Eduardo Peters
[phone]
Canoinhas - SC - Brazil
msn: eduardo@...

"Antes de imprimir esta mensagem, avalie a real necessidade. Pense no
seu compromisso com o meio ambiente e nos custos envolvidos. Reduza,
Reuse, Recicle!"
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Steve Fielding]

Hi Eduardo,
I have attached bin2hex.c, as provided by Javier Castillo

You can also download bin2hex Perl utility from

http://www.base2designs.com/downloads.htm

Regards,
Steve

Eduardo Peters <dudupeters@...> wrote:

Hello!!!

Where I found the bin2hex file???

Thanks

On 7/11/07, Steve Fielding wrote:

>
> Sorry, my mistake. My hello.or32 ELF file matched the original, but my hex
> file was incorrect because I forgot to use elf32-objcopy, before running
> bin2hex.
>
>
> Steve Fielding wrote:
> Hi Serge,
> I am trying to recompile hello.c, and I just cannot get the same hello.or32
> file as the one you supplied with s3esk-openrisc. It appears that the linker
> is inserting about 20 long words starting at 0x0, which pushes the reset
> vector away from 0x100, the normal Openrisc reset entry point. I have tried
> -nostartfiles option but no success. The hello.dis file is not identical to
> yours, but it looks sort of OK. Any ideas?
> Thanks,
> Steve
>
>
> Serge Vakulenko wrote:
> Thanx, Steve! Your hex-to-init script is very useful for creating
> bootloaders.
> ___
> Best wishes,
> Serge
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
>
>
> Steve Fielding
> Base2Designs
> 4409 Capitol Court
> Concord
> 94518-1933
> CA
> USA
> Tel: [phone]
> Fax: [phone]
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>

--
Eduardo Peters
[phone]
Canoinhas - SC - Brazil
msn: eduardo@...

"Antes de imprimir esta mensagem, avalie a real necessidade. Pense no
seu compromisso com o meio ambiente e nos custos envolvidos. Reduza,
Reuse, Recicle!"
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Eduardo Peters-2]

Some parts of this message have been removed. Learn more about Nabble's security policy.

Thanks Steve

This will be very useful for me!

Best Regards,
Peters

On 10/14/07, Steve Fielding <sfielding@...> wrote:

Hi Eduardo,
I have attached bin2hex.c, as provided by Javier Castillo

You can also download bin2hex Perl utility from

http://www.base2designs.com/downloads.htm

Regards,
Steve

Eduardo Peters <dudupeters@...> wrote:

Hello!!!

Where I found the bin2hex file???

Thanks

On 7/11/07, Steve Fielding wrote:
>
> Sorry, my mistake. My hello.or32 ELF file matched the original, but my hex
> file was incorrect because I forgot to use elf32-objcopy, before running
> bin2hex.
>
>
> Steve Fielding wrote:

> Hi Serge,
> I am trying to recompile hello.c, and I just cannot get the same hello.or32
> file as the one you supplied with s3esk-openrisc. It appears that the linker
> is inserting about 20 long words starting at 0x0, which pushes the reset
> vector away from 0x100, the normal Openrisc reset entry point. I have tried
> -nostartfiles option but no success. The hello.dis file is not identical to
> yours, but it looks sort of OK. Any ideas?
> Thanks,
> Steve
>
>

> Serge Vakulenko wrote:

> Thanx, Steve! Your hex-to-init script is very useful for creating
> bootloaders.
> ___
> Best wishes,
> Serge
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
>
>

> Steve Fielding

> Base2Designs
> 4409 Capitol Court
> Concord
> 94518-1933
> CA
> USA
> Tel: [phone]
> Fax: [phone]
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>

--
Eduardo Peters
[phone]
Canoinhas - SC - Brazil
msn: eduardo@...

"Antes de imprimir esta mensagem, avalie a real necessidade. Pense no
seu compromisso com o meio ambiente e nos custos envolvidos. Reduza,
Reuse, Recicle!"
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

--
Eduardo Peters
[phone]
Canoinhas - SC - Brazil
msn: eduardo@...

--~--~---------~--~----~------------~-------~--~----~
"Antes de imprimir esta mensagem, avalie a real necessidade. Pense no seu compromisso com o meio ambiente e nos custos envolvidos. Reduza, Reuse, Recicle!"
--~--~---------~--~----~------------~-------~--~----~
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[nassim09]

Hi

thanks for your great project .

i have the same board spartan-3E 500 ;and when i doawnload the bitsream withe usb cable ;i have Read’ and ‘Expected’ values only sometimes different like this with jtag parallel cable III:

[root@localhost jtag]# ./jp1 xpc3 9999
Connected to parallel port at 378
Dropping root privileges.
Read npc = 00000004 ppc = 00000000 r1 = 00000000
Expected npc = 4000000c ppc = 40000024 r1 = 00000005
Read npc = 00000000 ppc = 00000004 r1 = 00000000
Expected npc = 4000000c ppc = 40000024 r1 = 00000008
Read npc = 00000010 ppc = 0000000c r1 = 00000001
Expected npc = 40000024 ppc = 40000020 r1 = 0000000b
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 40000020 ppc = 4000001c r1 = 00000018
Read npc = 00000010 ppc = 00000014 r1 = 00000001
Expected npc = 4000001c ppc = 40000018 r1 = 00000031
Read npc = 0000001c ppc = 00000018 r1 = 00000001
Expected npc = 40000020 ppc = 4000001c r1 = 00000032
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 40000010 ppc = 4000000c r1 = 00000063
Read npc = 00000018 ppc = 00000000 r1 = 00000000
Expected npc = 40000024 ppc = 40000020 r1 = 00000065
Read npc = 00000020 ppc = 00000024 r1 = 00000001
Expected npc = 4000000c ppc = 40000024 r1 = 000000c9
result = 5eaddb85
Dropping root privileges.
JTAG Proxy server started on port 9999
Press CTRL+c to exit.

[root@localhost jtag]# ./jp1 xpc3 9999
Connected to parallel port at 378
Dropping root privileges.
Read npc = 0000000c ppc = 00000008 r1 = 00000001
Expected npc = 4000000c ppc = 40000024 r1 = 00000005
Read npc = 0000000c ppc = 00000008 r1 = 00000001
Expected npc = 4000000c ppc = 40000024 r1 = 00000008
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 40000024 ppc = 40000020 r1 = 0000000b
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 40000020 ppc = 4000001c r1 = 00000018
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 4000001c ppc = 40000018 r1 = 00000031
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 40000020 ppc = 4000001c r1 = 00000032
Read npc = 00000020 ppc = 00000020 r1 = 0021ca23
Expected npc = 40000010 ppc = 4000000c r1 = 00000063
Read npc = 00000000 ppc = 00000000 r1 = 00000000
Expected npc = 40000024 ppc = 40000020 r1 = 00000065
Read npc = 00000024 ppc = 00000024 r1 = 0021ca23
Expected npc = 4000000c ppc = 40000024 r1 = 000000c9
result = 5ef16fa1
Dropping root privileges.
JTAG Proxy server started on port 9999
Press CTRL+c to exit.

////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////

and in gdb i receve this

[root@localhost hello-uart]# or32-uclinux-gdb hello.or32
GNU gdb 5.0
Copyright 2000 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB. Type "show warranty" for details.
This GDB was configured as "--host=i686-pc-linux-gnu --target=or32-uclinux"...
(gdb) target jtag jtag://localhost:9999
Remote or1k debugging using jtag://localhost:9999
0x0 in ?? ()
(gdb) load
Loading section .vectors, size 0x128 lma 0x0
Loading section .text, size 0x348 lma 0x2000
Loading section .data, size 0x4 lma 0x2348
Loading section .rodata, size 0x1c lma 0x234c
Start address 0x2000 , load size 1168
Transfer rate: 467 bits/sec, 233 bytes/write.
(gdb) set $pc=0x100
(gdb) continue
Continuing.
warning: Invalid exception occured.

Program received signal ?, Unknown signal.
0x0 in ?? ()
(gdb)

thanks.lol

Serge Vakulenko wrote:

Hello,

I developed a minimal configuration of OR1K for Spartan-3E Starter Kit
board. Hello-uart is running fine. You can download the sources and
BIT image from here: http://vak.ru/pub/fpga/s3esk-openrisc.tgz

The configuration contains OpenRISC 1200 and a limited set of
OpenCores peripherals: UART16550, debug interface, and 16 kbytes of
internal FPGA block RAM.

Data/instruction caches, MMU and are disabled (lack of BlockRAMs).
Multiply-Accumulate instruction is also disabled (it takes 6% of slices).
The clock is decreased to 5MHz. Probably I was too pessimistic here...

To recompile the system from sources, you need Xilinx ISE Webpack
Linux version to be installed. Just run:

        make

and all the synthesis passes will be executed in order (xst, ngdbuild,
map, par, trce, bitgen) resulting in "or1k-mini.bit" file.

Device utilization summary:
Selected Device : 3s500efg320-4

 Number of Slices:                    2734  out of   4656    58%
 Number of Slice Flip Flops:          1725  out of   9312    18%
 Number of 4 input LUTs:              5113  out of   9312    54%
    Number used as logic:             5081
    Number used as RAMs:                32
 Number of IOs:                          9
 Number of bonded IOBs:                  9  out of    232     3%
 Number of BRAMs:                       14  out of     20    70%
 Number of MULT18X18SIOs:                3  out of     20    15%
 Number of GCLKs:                        3  out of     24    12%
___
Regards,
Serge Vakulenko
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc