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RE: I2C ip core integration for ALTERA FPGAs

by Richard Herveille :: Rate this Message:

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Hi Mark,

Are you willing to share the wrapper?
I can add it to the tarball.
More people are asking for this ...


Thanks,
Richard


-----Original Message-----
From: cores-bounces@... [mailto:cores-bounces@...] On
Behalf Of Mark McDougall
Sent: Friday, January 27, 2006 12:21 AM
To: Discussion list about free open source IP cores
Subject: Re: [oc] I2C ip core integration for ALTERA FPGAs

froger.e0300617@... wrote:

> I have the same probleme than you. I can't write in the register .
> For presc_HI, it is OK but for the other register, it 's always NULL.

I recently sucessfully integrated the I2C core onto an Avalon bus in a
Cyclone II without any problems whatsoever.

I used a top-level wrapper to convert the unsigned wb_adr_i to
std_logic_vector and also remove the std_logic generic ARST_LVL (SOPC
Builder barfs on std_logic parameters).

I guess the only difference here is that I'm not actually talking to it
from the NIOS, but rather from another micro which interfaces to the
Avalon bus externally.

But I can confirm that it does indeed work.

Regards,

--
Mark McDougall, Engineer
Virtual Logic Pty Ltd, <http://www.vl.com.au>
21-25 King St, Rockdale, 2216
Ph: +612-9599-3255 Fax: +612-9599-3266

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