RE: wdebug instruction causes XLB slave error acknowledge interrupt on MCF547X.

Hi Chris,

I did a simple test using the M5474EVB Lite board running dBUG ROM monitor:

dBUG> di 20000
00020000: 2C80                 MOVE.L    D0,(A6)
00020002: 0002                 DC.W      0x0002
00020004: 0000                 DC.W      0x0000
00020006: 0000                 DC.W      0x0000
00020008: 267C 0002 0000       MOVEA.L   #0x00020000,A3
0002000E: 4E71                 NOP
00020010: FBD3 4E71            WDEBUG    (A3)
00020014: 4E71                 NOP
00020016: 4E71                 NOP
00020018: 4E71                 NOP
0002001A: 4E71                 NOP
0002001C: 4E71                 NOP
0002001E: 4E4F                 TRAP      #0x0F
00020020: 4E71                 NOP
00020022: 4E71                 NOP
00020024: 4E71                 NOP

 

I set the PC to 0x20008 and issued "go" command.

Watching PSTCLK with oscope, it is running be default.  After executing the above code, it is low.

So I'm seeing it work OK.

Regards,

David

 

David E Seymour

http://www.freescale.com/coldfire

 

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From: coldfire-bounce@... [mailto:coldfire-bounce@...] On Behalf Of nop head
Sent: Tuesday, April 07, 2009 9:27 AM
To: Seymour David-RA2693
Subject: [ColdFire] wdebug instruction causes XLB slave error acknowledge interrupt on MCF547X.

I want to disable the PST signals, when not debugging, to reduce RF emissions. I used the following code successfully in an MCF537X project, but when I use it on a V4 processor I get an interrupt from the XLB arbiter.

csr_data       dc.w    0010110010000000b       ;CSR
                   dc.w    2,0,0                   ;PCD
...
                lea     csr_data,a0
                dc.w    1111101111010000b     ;wdebug.l a0
                dc.w    0000000000000011b

My assembler doesn't support wdebug, hence the hand coded dc.w stuff. All the code does is set the PCD bit in the BDM CSR register.

The fault address is csr_data + 4, i..e. half way through the data. The fault is a slave error acknowledge. The data is correctly aligned on a four byte boundary and is certainly accessible by normal instructions.

Anybody know what is going on here?

TIA, Chris

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