« Return to Thread: [TECH] Can anyone explain?

Re: [TECH] Can anyone explain?

by Jahn-3 :: Rate this Message:

| View in Thread

Thank you for your reply.
Yes,
it is in a system that has a processor(CPU).
And the SDRAM is
ELPIDA EDD5116AGTA-4 (32M words × 16 bits)
or similar.
How can I address them?
Thanks

> On Fri, Mar 16, 2012 at 6:55 AM, <jana1972@...> wrote:
>
> > But how are SDRAM used? Also like SPI device?
> > In my device e.g. there are 2 and 2 SDRAM integrated
> > circuits(modues).Together 4 modules.
> > .( Let's call them M1,M2,M3,M4.)
> >  M1&M3 are connected in a parallel way and having its OWN clock and M2&M4
> >  are
> > connected in a parallel way too and having its OWN clock but different
> > from M1&M3.
> > How I can say that some data should be written to a module M1 and not M2?
> > Is there any tutorial how SDRAM can be  used in embeded systems?
> >
>
> Depends entirely on what kind of SDRAM you have. There are normal raw DRAM
> modules with which you must use an FPGA configured as a DRAM controller to
> use. Also, there are these:
> http://www.micron.com/products/dram/PSRAM-CellularRAM.html which let you
> access them like asynchronous SRAMs (they have a built in DRAM controller).
>
> You almost certainly have raw SDRAM modules, so you need to use a DRAM
> controller. You can use a CPLD or an FPGA and the free Xilinx tool has an
> SDRAM core generator for many chips to turn your FPGA into a DRAM
> controller.
>
> If those modules are part of some random device you opened up, chances are,
> there is some kind of controller, powerful CPU, or FPGA on there already
> using them. Maybe access it through one of those things?
> --
> http://www.piclist.com PIC/SX FAQ & list archive
> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist



--
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist

 « Return to Thread: [TECH] Can anyone explain?