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Re: Re: Digest from coldfire@wildrice.comX-SpamDetect-Info: ------------- Start ASpam results ---------------
X-SpamDetect-Info: This message may be spam. This message BODY has been altered to show you the spam information X-SpamDetect: *******: 7.000000 spf adsl=3.0, GreyPassed=1.0, DodgySource=2.0, SPF Default Fail=1.0 X-SpamDetect-Info: ------------- End ASpam results ----------------- Bryan Kattwinkel wrote: > <div class="moz-text-flowed" style="font-family: -moz-fixed">Phil > Roets wrote: > >> I am developing a multitask application on a MFC5282 board and >> intended to create a semaphore type > > method to control access to some of the common variables. Replacing > the 'tst.b' with 'tas.b' in the > > snippet : >> move.l 4(%sp),%a0 >> move.l #128,%d0 >> tas.b (%a0) >> jbne .L4 >> move.b #-128,(%a0) >> clr.b %d0 >> ..L4: >> rts >> causes a 'invalid instruction for the architecture ... > > Because the 5282 does not have that instruction. (tas is ISA-B, 5282 > is ISA-A+). > > Use bset, which sets 1 bit (by number, not mask!) and sets the z flag > to the *previous* value of the bit: > > clr.l D0 /* bit 0 */ > bset.b D0,(A0) /* set one bit atomically */ > sne D0 /* previous state */ > rts > > If you need a counting semaphore, you can add/subtract to a long word > of memory atomically (in this case the flags represent the state at > the end of the operation). > > These operations generally have to be written in assembly; typical C > compilers will not generate the atomic-memory forms [destination > (a0)]. They are atomic with respect to the single 5282 processor; tas > would only be needed with multiple CPUs, which I don't think you can > do with that chip. > </div> bit better! --- coldfire@... Send a post to the list. coldfire-join@... Join the list. coldfire-digest@... Join the list in digest mode. coldfire-leave@... Leave the list. |
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