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Re: I2C core VHDL testbench

by heedaf :: Rate this Message:

I've been working on this thing for weeks and I can't figure it out. Since you have some success, could I ask for your help with the verilog side? I'm using ISE 9.1 also, is there anyway that you would send me the verilog project and then maybe I can figure out what the heck I'm doing wrong. I'd sure appreciate it. If you can't, how did you add the test bench in the project? I put the "test_bench_top" on top of the "wb_master_model" all in one .v test benc file. I put the slave in its own .v file. Everything compiles correctly but the start command (8'h90) doesn't seem to be written. If I can get this running - then I'll try and give you a hand.
Thanks,
Dewayne

--- On Mon 04/02, < m.afgani@... > wrote:

From: [mailto: m.afgani@...]
To: cores@...
Date: Mon, 2 Apr 2007 10:58:17 +0200 (CEST)
Subject: Re: [oc] I2C core VHDL testbench

Hi,

The verilog testbench works for me. That's why it's all the more frustrating. I am using
Xilinx ISE 9.1.03i

Best,
Mostafa

PS> I'm copying this conversation to the OC forum

On 4/2/07, D R wrote:
>
> I've been trying to get either verilog or vhdl versions to work. I'm trying to the
> verilog test bench to work but I'm getting similar errors. What software are you
> using? I'm thinking that unless you use synopsis it won't work.

----- Original Message -----
From: m.afgani at gmail.com
To:
Date: Mon Apr 2 02:18:49 CEST 2007
Subject: [oc] I2C core VHDL testbench

> Hello,
>
> I am trying to get a VHDL testbench running with the VHDL I2C core
> and
> and Verilog I2C slave model. I've implemented the WISHBONE master
> as a
> simple state machine. I tried to follow the same steps in the
> Verilog
> testbench in CVS but somehow that is insufficient. The I2C master
> drives the SCL and SDA lines from 'H' to '0' and '0' to 'H' as
> expected but the slave does not appear to respond to the commands.
> The
> slave SDA line is perpetually at 'Z'.
> At this point I am really not sure what might be wrong and am in
> desperate need of some help. The source files are available here:
> http://m.afgani.googlepages.com/WB_I2C.zip
> Thanks in advance,
> Mostafa
>
>
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