> downloaded JOP onto the xilinx kit again(fresh code) and started analysing
> the code.Before "SCIO BLOCK" there is an extension block where the output is
> "mem_data" and this data is parallel. So to get the output from SCIO block
> should I replace SCIO (sc_uart,sc_cnt) with SC2WB.vhd code?I tried this but
> am stuck when it comes to mapping memory as the last two block's memories
> are connected.
>
> Am trying to confirm if what I am doing is right. Could you please advise
me
No, that's wrong.
> on how to get the parallel output from SCIO in order to connect it to SC2WB?
> The whole idea is to obtain the parallel output from JOP.
> Hence connect the output to I2S.
Please, please, please: Look into scio_dspio.vhd for an example
how to connect a Wishbone slave to JOP.
Martin
_______________________________________________
http://www.opencores.org/mailman/listinfo/cores
