Hello again,
changing the line 69 in x64dll.asm from
mov rdi, QWORD PTR [?g_cacheLineSize@CryptoPP@@3IA]
to
mov edi, DWORD PTR [?g_cacheLineSize@CryptoPP@@3IA]
solved the problem for me. Please confirm that what I am doing makes
sense, because I am not used to assembly language:
- g_cacheLineSize is a word32 -> DWORD PTR [...] tells the compiler
about it
- edi is 32Bit access to rdi register -> the high order bits in rdi
are zero-padded which is what I want
Best regards,
Andrew Bromba
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