Chris,
> I find it hard to believe, but it looks like the V4
> core partially executes code that is branched around.
We have our RTOS running very reliably on V4E processors and aren't
having any problems like this. These issues are related to your
RAMBAR, ACR, and MMU configuration, and whether regions are set for
precise or imprecise accesses. Imprecise mode allows speculative
accesses, precise mode doesn't.
> Why does it sometimes lock the processor rather than giving an XLB
> interrupt.
May be related to the fact that bus errors in background debug mode
can hang the processor.
Best regards,
Tim
nop head wrote:
> I am having a problem with code that works on 68K and V3 Coldfires not
> working on V4. I find it hard to believe, but it looks like the V4 core
> partially executes code that is branched around. Here is a distilled
> example of the sort of code that fails, not pretty but I think it is
> valid C: -
>
> typedef void (*f_ty)(void); // a function pointer
>
> // A union of an integer and a pointer, initialised to an integer that
> is not a valid address
> union {
> int x;
> f_ty f;
> } p = { 0x55555555 };
>
> // This is the sort of sequence that fails
> {
> dword d = p.x;
> f_ty f = p.f;
> if(d != 0x55555555)
> f();
> }
>
> This compiles to: -
>
> movea.l _p,a0
> cmpa.l #0x55555555
> beq.s skip
> jsr (a0)
> skip
>
> So a0 should contain all 5's, which is not a valid address in my map,
> but the branch should prevent it being used as an address. What actually
> happends seems to depend on the code alignment, etc.
>
> It can simply run past the code OK.
>
> It can give an XLB interrupt with 55555554 in the address capture register.
>
> It can lock up the processor. When I hit break in my BDM debugger the PC
> is a couple of instructions past this block.
>
> If I set a breakpoint anywhere in the program the code runs OK,
> regardless of whether the breakpoint is triggered.
>
> So it looks like the core sometimes does a pre-fetch on 55555555, even
> though it will not be executed. My questions are: -
>
> Is this a known bug/feature in the V4 core?
> Why does it sometimes lock the processor rather than giving an XLB
> interrupt.
> Why does having a breakpoint active make it work?
> Is that a workaround or do I have to find all the places in my code that
> this could happen an insert NOPs or something. A complete nightmare
> because I have a whole state machien architecture that relies on being
> able to contain addresses and some flags in the same 32 bit value!
>
> Chris
>
>
>
coldfire@... Send a post to the list.
>
coldfire-join@... Join the list.
coldfire-digest@...
> Join the list in digest mode.
coldfire-leave@... Leave the list.
------------------------------------------------------------
Tim Stoutamore, Principal Engineer
Blunk Microsystems, LLC
6576 Leyland Park Drive
San Jose, CA 95120-4558
Tel: 408/323-1758
stout@...
www.blunkmicro.com
------------------------------------------------------------
---
coldfire@... Send a post to the list.
coldfire-join@... Join the list.
coldfire-digest@... Join the list in digest mode.
coldfire-leave@... Leave the list.