Re:Re: problem in running 'Hello_fl' example by codewarrior 8.7

[F KH]

Thanks for you replies.
I set the parallel port on EPP and it seems OK.
The memory is external SRAM(4 x KM736V987) in address 0x10000000 and CS1 is enabled for it in config file:

; Chip select CS1 - external synchronous burst RAM
writemem.l  0x2fc10c  0xFF800000      ; OR1=0xFF800000
                                                         ; BSCY 0x#######E = 0x0 - 0-clock burst beat length
                                                         ; SCY  0x######F# = 0x0 - (2+SCY)*clock = 0 wait
                                                         ; AM   0xFFFE#### = 0xFFF80000 - 512 kByte
                                                         ;                 = 0xFFF00000 -   1 MByte
                                                         ;                 = 0xFFE00000 -   2 MByte
                                                         ;                 = 0xFFC00000 -   4 MByte
                                                         ;                 = 0xFF800000 -   8 MByte
                                                         ;                 = 0xFF000000 -  16 MByte
writemem.l  0x2fc108  0x10000001       ; BR1=0x10000001
;writemem.l 0x2fc108 0x10000001        ; BR1=0x00000001 relocation to base address 0x0
                                                         ; Bit 0x#######1 = 1 - region valid
                                                         ; Bit 0x#######2 = 0 - burst access enabled
                                                         ; Bit 0xFFFF#### = 0x1000 - Base address = 0x10000000

I select connect from debug menu and system connected,then in debug>EPPC>fill memory window set:
Memory Type:32 bit
Memory address:0x10000000
Memory Size:100

and it writes to memory(I can view).But when I check it for Memory size 0x8000 makes error and every thing goes wrong.  
I select the checkbox for 'verify memory writes',the verify fails.
PhyCORE has 4M SRAM and i don't know what make this errors?

Best Regards
Farzane


     

[Dobbin Allan-r11834]

Is EPP an improvement, or were able to connect previously?
 
Try debugging to see where it fails - 4000, 2000, 1000?  
Try increasing the wait states and the burst wait states.
Try changing the address mask in the OR register to see if that helps.
 
When you enabled the debugger to verify downloads, what addresses
failed?
When you enter at __start and view mixed mode, do you get the correct
opcodes?
 
May I ask what line of business you are in?
 
Regards,
Allan

________________________________

From: MPC500@... [mailto:MPC500@...] On Behalf
Of F KH
Sent: Tuesday, January 06, 2009 10:26 AM
To: MPC500@...
Subject: [MPC500] Re:Re: problem in running 'Hello_fl' example by
codewarrior 8.7



Thanks for you replies.
I set the parallel port on EPP and it seems OK.
The memory is external SRAM(4 x KM736V987) in address 0x10000000 and CS1
is enabled for it in config file:

; Chip select CS1 - external synchronous burst RAM
writemem.l  0x2fc10c  0xFF800000      ; OR1=0xFF800000
                                                         ; BSCY
0x#######E = 0x0 - 0-clock burst beat length
                                                         ; SCY
0x######F# = 0x0 - (2+SCY)*clock = 0 wait
                                                         ; AM
0xFFFE#### = 0xFFF80000 - 512 kByte
                                                         ;
= 0xFFF00000 -   1 MByte
                                                         ;
= 0xFFE00000 -   2 MByte
                                                         ;
= 0xFFC00000 -   4 MByte
                                                         ;
= 0xFF800000 -   8 MByte
                                                         ;
= 0xFF000000 -  16 MByte
writemem.l  0x2fc108  0x10000001       ; BR1=0x10000001
;writemem.l 0x2fc108 0x10000001        ; BR1=0x00000001 relocation to
base address 0x0
                                                         ; Bit
0x#######1 = 1 - region valid
                                                         ; Bit
0x#######2 = 0 - burst access enabled
                                                         ; Bit
0xFFFF#### = 0x1000 - Base address = 0x10000000

I select connect from debug menu and system connected,then in
debug>EPPC>fill memory window set:
Memory Type:32 bit
Memory address:0x10000000
Memory Size:100

and it writes to memory(I can view).But when I check it for Memory size
0x8000 makes error and every thing goes wrong.  
I select the checkbox for 'verify memory writes',the verify fails.
PhyCORE has 4M SRAM and i don't know what make this errors?

Best Regards
Farzane



 


[Non-text portions of this message have been removed]

[Dees Randy-rsaf30]

are setting setting up CS0? CS0 acts as a global chip select until OR0
is written and over-rides all other chip selects.
 
randy.


[Non-text portions of this message have been removed]

[F KH]

--- In MPC500@..., "Dees Randy" <randy.dees@...> wrote:
>
> are setting setting up CS0? CS0 acts as a global chip select until
OR0
> is written and over-rides all other chip selects.
>  
> randy.
>
>
> [Non-text portions of this message have been removed]
>
My SRAMs are on CS1 and flashes are in CS0.The values of OR0 and BR0
are:
writemem.l 0x2fc100 0x00000003 ; BRo
writemem.l 0x2fc104 0xFF800030 ; ORo

and for CS1 are:
writemem.l 0x2fc10c 0xFF800000 ; OR1
writemem.l 0x2fc108 0x10000001 ; BR1

This are written in cfg file of project.

regards
farzane

[F KH]

Hello,
Thank you who are patient to me.
I was in doubt with setting of printer port and thought maybe
that makes this errors. But I am sure about it now.

When I received your reply, start checking addresses with
external address of SRAM in 0x10000000 and size of  10.
After that I make the size of it larger and each time I viewed
the memory and every thing was Ok, until I set the size to
0x8000.That time the system makes error and so after that.
Now, every time I connect to system, this error is showing:
'The address(0x10000000) specified for FPU buffer address
cannot be accessed'.

The SRAMs of phycore are connected to CS1 and two
flashes are connected to CS0.
I changed address mask in OR registers, and increase the
burst wait states, but it doesn't solve the problem.

When I enabled the debugger to verify downloads, at
address 0x10002000(start of code),it makes error.

Regards,
Farzane

--- In MPC500@..., "Dobbin Allan" <Allan.Dobbin@...>
wrote:
>
> Is EPP an improvement, or were able to connect previously?
>  
> Try debugging to see where it fails - 4000, 2000, 1000?  
> Try increasing the wait states and the burst wait states.
> Try changing the address mask in the OR register to see if that
helps.
>  
> When you enabled the debugger to verify downloads, what addresses
> failed?
> When you enter at __start and view mixed mode, do you get the
correct

> opcodes?
>  
> May I ask what line of business you are in?
>  
> Regards,
> Allan
>
> ________________________________
>
> From: MPC500@... [mailto:MPC500@...] On

Behalf

> Of F KH
> Sent: Tuesday, January 06, 2009 10:26 AM
> To: MPC500@...
> Subject: [MPC500] Re:Re: problem in running 'Hello_fl' example by
> codewarrior 8.7
>
>
>
> Thanks for you replies.
> I set the parallel port on EPP and it seems OK.
> The memory is external SRAM(4 x KM736V987) in address 0x10000000

and CS1

> is enabled for it in config file:
>
> ; Chip select CS1 - external synchronous burst RAM
> writemem.l  0x2fc10c  0xFF800000      ; OR1=0xFF800000
>                                                          ; BSCY
> 0x#######E = 0x0 - 0-clock burst beat length
>                                                          ; SCY
> 0x######F# = 0x0 - (2+SCY)*clock = 0 wait
>                                                          ; AM
> 0xFFFE#### = 0xFFF80000 - 512 kByte
>                                                          ;
> = 0xFFF00000 -   1 MByte
>                                                          ;
> = 0xFFE00000 -   2 MByte
>                                                          ;
> = 0xFFC00000 -   4 MByte
>                                                          ;
> = 0xFF800000 -   8 MByte
>                                                          ;
> = 0xFF000000 -  16 MByte
> writemem.l  0x2fc108  0x10000001       ; BR1=0x10000001
> ;writemem.l 0x2fc108 0x10000001        ; BR1=0x00000001 relocation

to

> base address 0x0
>                                                          ; Bit
> 0x#######1 = 1 - region valid
>                                                          ; Bit
> 0x#######2 = 0 - burst access enabled
>                                                          ; Bit
> 0xFFFF#### = 0x1000 - Base address = 0x10000000
>
> I select connect from debug menu and system connected,then in
> debug>EPPC>fill memory window set:
> Memory Type:32 bit
> Memory address:0x10000000
> Memory Size:100
>
> and it writes to memory(I can view).But when I check it for Memory

size

> 0x8000 makes error and every thing goes wrong.  
> I select the checkbox for 'verify memory writes',the verify fails.
> PhyCORE has 4M SRAM and i don't know what make this errors?
>
> Best Regards
> Farzane
>
>
>
>  
>
>
> [Non-text portions of this message have been removed]
>

[Dees Randy-rsaf30]

The debugger that you are using reserves space at address 0x10000000 as
a scratchpad area for reading the core Floating Point registers. The
debugger allows this to be moved in it's configuration. it will
over-write this area at every breakpoint or single step instruction. If
you want your code there, you need to change the debugger configuration.

________________________________

From: MPC500@... [mailto:MPC500@...] On Behalf
Of farzane_kh
Sent: Monday, January 12, 2009 4:14 AM
To: MPC500@...
Subject: [MPC500] Re:Re: problem in running 'Hello_fl' example by
codewarrior 8.7



Hello,
Thank you who are patient to me.
I was in doubt with setting of printer port and thought maybe
that makes this errors. But I am sure about it now.

When I received your reply, start checking addresses with
external address of SRAM in 0x10000000 and size of 10.
After that I make the size of it larger and each time I viewed
the memory and every thing was Ok, until I set the size to
0x8000.That time the system makes error and so after that.
Now, every time I connect to system, this error is showing:
'The address(0x10000000) specified for FPU buffer address
cannot be accessed'.

The SRAMs of phycore are connected to CS1 and two
flashes are connected to CS0.
I changed address mask in OR registers, and increase the
burst wait states, but it doesn't solve the problem.

When I enabled the debugger to verify downloads, at
address 0x10002000(start of code),it makes error.

Regards,
Farzane

.
 
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[Non-text portions of this message have been removed]