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cache pre-fetch

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	cache pre-fetch by Orion Letizi :: Rate this Message: Reply to Author \| View Threaded \| Show Only this Message What do you folks think is the best way to pre-fetch a cache into L1 heap? --Orion _______________________________________________ tc-dev mailing list tc-dev@... http://lists.terracotta.org/mailman/listinfo/tc-dev
	Re: cache pre-fetch by photon :: Rate this Message: Reply to Author \| View Threaded \| Show Only this Message RE: [tc-dev] cache pre-fetch Take it you mean pre-fetch into L1 from L2. Usually fault-count (element in tc-config) and maxDNALRUSize (tc-property element in tc-config) needs to be tuned. In some implementations consultants have used TIM-Maps which features a NPHashmap (i.e. non partial HashMap) - so that on touching the Map all keys and values get sucked into the L1 in one shot. This is ofcourse not an option, if using TIM-DistributedCache - so afaik, fall back to tuning fault-count/maxDNALRUSize. Thanks... -----Original Message----- From: tc-dev-bounces@... [tc-dev-bounces@...] On Behalf Of Orion Letizi Sent: Tuesday, August 04, 2009 10:25 AM To: tc-dev Subject: [tc-dev] cache pre-fetch What do you folks think is the best way to pre-fetch a cache into L1 heap? --Orion _______________________________________________ tc-dev mailing list tc-dev@... http://lists.terracotta.org/mailman/listinfo/tc-dev _______________________________________________ tc-dev mailing list tc-dev@... http://lists.terracotta.org/mailman/listinfo/tc-dev
	Re: cache pre-fetch by Orion Letizi :: Rate this Message: Reply to Author \| View Threaded \| Show Only this Message Yeah. That's what I meant. Cool. Thanks for the info. --Orion On Aug 4, 2009, at 10:49 AM, Sreenivasan Iyer wrote: > Take it you mean pre-fetch into L1 from L2. Usually fault-count > (element in tc-config) and maxDNALRUSize (tc-property element in tc- > config) needs to be tuned. > > In some implementations consultants have used TIM-Maps which > features a NPHashmap (i.e. non partial HashMap) - so that on > touching the Map all keys and values get sucked into the L1 in one > shot. This is ofcourse not an option, if using TIM-DistributedCache > - so afaik, fall back to tuning fault-count/maxDNALRUSize. > > Thanks... > > > > -----Original Message----- > From: tc-dev-bounces@... [mailto:tc-dev-bounces@... > ] On Behalf Of Orion Letizi > Sent: Tuesday, August 04, 2009 10:25 AM > To: tc-dev > Subject: [tc-dev] cache pre-fetch > > What do you folks think is the best way to pre-fetch a cache into L1 > heap? > > --Orion > _______________________________________________ > tc-dev mailing list > tc-dev@... > http://lists.terracotta.org/mailman/listinfo/tc-dev > > _______________________________________________ > tc-dev mailing list > tc-dev@... > http://lists.terracotta.org/mailman/listinfo/tc-dev _______________________________________________ tc-dev mailing list tc-dev@... http://lists.terracotta.org/mailman/listinfo/tc-dev