Hello,
I am using a Verdex video interface to capture data from a custom CCD processor. The interface goes directly into a small FIFO on the PXA270. I setup a DMA to get data from the FIFO into bulk memory. After an image has been transferred, it is sent over the network to a server. It takes too long to capture the image and then send it out. I'd like to start sending data out while it is being received. Unfortunately, the DMA buffer is locked and cannot be accessed by the user-space program while DMA is running.
My idea is to break up the transfer into N smaller DMAs. As each DMA completes, I transfer that chunk, while the next DMA is writing to a new buffer. The way the custom hardware is setup, I cannot tolerate pauses in emptying the FIFO (it will overrun). Thus, I need the DMAs to run (almost) contiguously. Is there a way to queue up all N DMA requests and have the kernel take care of starting each one after the previous one has completed?
Thanks.
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