dsPIC ADC help needed

[Nathan House-5]

Since apparently no one had any words of wisdom for me, I went ahead and
picked semi-random values for ADCS and SAMC.

I am still not sure what value to give ADCS, so I just chose "1." However,
example 20-1 in the dsPIC30F4011 datasheet (70135F.pdf) computes ADCS to be
"9." Why? I thought a shorter conversion time was better? Should my ADCS
value be higher then the value of "1" that I chose for it?

As for SAMC, I'm not entirely sure what to set that at either. The SAMC bits
select how long the sample time is, in multiples of Tad. Since my Tad value
is well above the minimum time (min. time is 83.33ns, my Tad is currently
400ns -- which makes my ADCS 1), should I make it "1" as well? I have it at
"3" right now, simply because I saw an example use that value.

Here's the code I'm using:

/************** ADC Interrupt Code **************/

void __attribute__((__interrupt__)) _ADCInterrupt(void)
{
    an1 = ADCBUF0;
    an2 = ADCBUF1;
    an3 = ADCBUF2;
    an4 = ADCBUF3;

    IFS0bits.ADIF = 0; // Clear interrupt flag
}


    /*************** ADC ***************/
    ADCON1bits.ADON  = 0; // Turn OFF A/D module

    // B4/AN4 (pin 6)
    ADPCFGbits.PCFG4 = 0; // Set pin to analog mode
    TRISBbits.TRISB4 = 1; // Set pin AN4 to INPUT
    ADCSSLbits.CSSL4 = 1; // Include AN4 in scan

    ADCON1bits.FORM = 0;   // Buffer output = Integer
    ADCON1bits.ADSIDL = 1; // Stop module in idle mode
    ADCON1bits.SIMSAM = 1; // Sample CH0 .. CH3 Simultaneously, convert CH0
.. CH3
    ADCON1bits.ASAM = 1;   // Automatically start sampling after conversion
is done(auto sample)
    ADCON1bits.SSRC = 7;   // Internal counter ends sampling and starts
conversion (auto convert)

    ADCON2bits.VCFG = 0;   // Voltage reference is AVdd and AVss (internal)
    ADCON2bits.CHPS = 2;   // Converts CH0 .. CH3
    ADCON2bits.SMPI = 0;   // Interrupt at end of every sample/convert
sequence
    ADCON2bits.ALTS = 0;   // Use MUX A inputs
    ADCON2bits.BUFM = 0;   // Use single buffer, 16 word ("1" = two 8 word
buffers)

    ADCON3bits.ADCS = 1;   // A/D conversion clock period (whatever that
means). Equation 18-1 in 30F FRM
    ADCON3bits.SAMC = 3;   // Sample time, in multiples of Tad
    ADCON3bits.ADRC = 0;   // Use system clock

    ADCHSbits.CH123SA = 1; // Positive input for CH1 is AN3, CH2 is AN4, CH3
is AN5
    ADCHSbits.CH123NA = 0; // Negative input for CH1, CH2, and CH3 is Vref-

    IEC0bits.ADIE = 1; // Interrupts enabled
    IFS0bits.ADIF = 0; // Clear interrupt flag

    ADCON1bits.ADON  = 1; // Turn ON A/D module

This code seems to work, although I really have no idea if I've set ADCS and
SAMC correctly. One other thing that I am confused about is how the result
is getting stored. You can see in the above code that I have an interrupt
after every conversion, meaning (according to the datasheet) that all of the
conversion results will be stored in ADCBUF0 (the module stores results
starting at ADCBUF0 after every interrupt). But, for some reason the value
coming from the pin connected to the potentiometer is being stored in
ADCBUF2!!? ADCBUFD has a value of 32, and ADCBUF1 and ADCBUF3 appear to be
random values, they change too fast for me to see what they actually are.

If anyone could shed some light on this odd behavior, or help me understand
how to choose the right values for ADCS and SAMC, I'd really appreciate the
help.

Thanks,

Nathan
--
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist

[Nathan House-5]

I apologize if I am getting on people's nerves with my perseverance on this
matter.

The 30F FRM says "The A/D converter requires one A/D clock cycle (TAD)
to..." Since I am using the system clock for the A/D module, does it make
sense to say that the time for one A/D clock cycle should equal the system
clock instruction cycle time?

If I use the equation provided in the family reference manual to calculate
ADCS, using 400ns as the Tad value (400ns is my instruction cycle time,
Tcy), then the answer is "1." If Vincent Prats is correct, in that the
smallest conversion time achievable is desirable, then my ADCS value should
be satisfactory. But to my confusion, the manual shows an example where the
Tad time is significantly longer then both the Tcy shown and the minimum Tad
(83.33ns) time. Why would they do this? Either my understanding of this
matter is wrong, or the example given is not as efficient as it could be.
Which is it?

[image: http://roboticsguy.com/images/misc/example_21.png]
--
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist

[Olin Lathrop]

Nathan House wrote:
> If I use the equation provided in the family reference manual to
> calculate ADCS, using 400ns as the Tad value (400ns is my instruction
> cycle time, Tcy),

Strange choice of PIC if you're only running it at 400nS instruction period.

> then the answer is "1." If Vincent Prats is
> correct, in that the smallest conversion time achievable is
> desirable, then my ADCS value should be satisfactory. But to my
> confusion, the manual shows an example where the Tad time is
> significantly longer then both the Tcy shown and the minimum Tad
> (83.33ns) time. Why would they do this?

First, the example may not be correct.  There are a lot of bad examples out
there.  Unfortunately the bozos that just took a whole week to blink a LED
and think they deserve a Nobel prize for it are more likely to post examples
of their bugware than those that write the code correctly in 5 minutes and
go on with things because it's not a big deal.  Some Microchip examples are
occasionally less than ideal, or at least not stellar examples of
programming discipline.

Second, what's the problem?  As long as the minimum and maximum Tad times
listed in the datasheet are adhered to, it's fine.  Someone at Microchip sat
down and figured out over what range the A/D lives up to its specs.  They
understand the tradeoffs more than we can.  You should generally just take
their word for it.

I can make a reasonable guess that at the low end of Tad the issue is
settling time of the comparator and other circuitry to decide the next bit.
At the high end it's probably the sample and hold drifting.  Any value in
between is good enough.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
[phone].  Gold level PIC consultants since 2000.
--
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist