linux-2.6.24

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linux-2.6.24

by rich_daddio :: Rate this Message:

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Hi All,
linux-2.6.24 patch for or32 is finally avaiable for use only tested on
sim as usual:

To get it:
ftp www.meansoffreedom.com
user: download
pw: download

cd mof_orsoc

get linux_2.6.24_or32_unified_simtested.bz2

Shout out to Stefan a friend of ORSoC for tracking down an
inconsistency between kernel and uclibc.

Also, I am hoping to "catch-up" to more recent kernel releases if any
one has time to track down the usual upgrade bugs & etc. plus test
please contact us.

Enjoy,

Rich d
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Re: linux-2.6.24

by Jeremy Bennett-4 :: Rate this Message:

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On Sun, 2009-02-22 at 20:25 +0100, rich_daddio@... wrote:

> Hi All,
> linux-2.6.24 patch for or32 is finally avaiable for use only tested on
> sim as usual:
>
> To get it:
> ftp www.meansoffreedom.com
> user: download
> pw: download
>
> cd mof_orsoc
>
> get linux_2.6.24_or32_unified_simtested.bz2
>
> Shout out to Stefan a friend of ORSoC for tracking down an
> inconsistency between kernel and uclibc.
>
> Also, I am hoping to "catch-up" to more recent kernel releases if any
> one has time to track down the usual upgrade bugs & etc. plus test
> please contact us.

Hi Rich, Stefan,

Great work. No problems building (I left out the Ethernet), but it blew
up early when booting with an instruction alignment exception. Here's
the console log.

Copying Linux... Ok, booting the kernel.
****************** counters reset ******************
cycles 132648746, insn #9127627
****************** counters reset ******************

Runarunaround: Unhandled exception 0x600: EPC=0xc0008518
exit(34417)
@reset : cycles 132648746, insn #9127627
@exit  : cycles 252659526, insn #14069071
 diff  : cycles 120010780, insn #4941444

That looks to be in the middle of _timer_interrupt (starts at c00084f4).
Here's the disassembly from GDB:

0xc00084f4 <timer_interrupt+0>: l.addi   r1,r1,-40
0xc00084f8 <timer_interrupt+4>: l.sw     24(r1),r9
0xc00084fc <timer_interrupt+8>: l.sw     28(r1),r12
0xc0008500 <timer_interrupt+12>:        l.sw     32(r1),r14
0xc0008504 <timer_interrupt+16>:        l.sw     36(r1),r16
0xc0008508 <timer_interrupt+20>:        l.ori    r14,r3,0x0
0xc000850c <timer_interrupt+24>:        l.addi   r16,r0,112
0xc0008510 <timer_interrupt+28>:        l.addi   r12,r1,0
0xc0008514 <timer_interrupt+32>:        l.movhi  r5,0x8000
0xc0008518 <timer_interrupt+36>:        l.lwz    r3,48(r10)
0xc000851c <timer_interrupt+40>:        l.and    r4,r12,r5
0xc0008520 <timer_interrupt+44>:        l.and    r3,r3,r5
0xc0008524 <timer_interrupt+48>:        l.sfeq   r4,r3
0xc0008528 <timer_interrupt+52>:        l.bnf    <timer_interrupt+92>
0xc000852c <timer_interrupt+56>:        l.nop    0
0xc0008530 <timer_interrupt+60>:        l.movhi  r5,0x7fff
0xc0008534 <timer_interrupt+64>:        l.ori    r5,r5,0xffff
0xc0008538 <timer_interrupt+68>:        l.and    r12,r12,r5

This looks suspicious. The instruction at c0008518 is an indexed load
off r10, which doesn't seem to be initialized, so could easily be
misaligned. The code for timer_interrupt (in arch/or32/kernel/time.c)
is:

irqreturn_t timer_interrupt(struct pt_regs * regs)
{
  check_stack(regs, __FILE__, __FUNCTION__, __LINE__);

        /*
         * Here we are in the timer irq handler. We just have irqs locally
         * disabled but we don't know if the timer_bh is running on the other
         * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
         * the irq version of write_lock because as just said we have irq
         * locally disabled. -arca
         */
        write_seqlock(&xtime_lock);
        do_timer_interrupt(regs);
        write_sequnlock(&xtime_lock);
 
        return IRQ_HANDLED;
}

This looks like a problem with the write_seqlock macro. This in turn
uses spin_lock. I notice we don't have our own asm/spinlock.h. I wonder
if something generic is causing problems?

I used the latest or1ksim (0.3rc2), with an xterm as console. Running on
Fedora 9 Linux. Let me know if you'd like me to

A note on the sim.cfg file. This could do with getting rid of the bus
entries (for each section they are ignored but give a bucket of
warnings). Also it makes sense for clkcycle to be 10ns, not 10000ns.

For the record I got some warnings. Two when making the menuconfig:

  SHIPPED scripts/kconfig/zconf.hash.c
  HOSTCC  scripts/kconfig/zconf.tab.o
scripts/kconfig/lex.zconf.c:1642: warning: ‘input’ defined but not used
  HOSTLD  scripts/kconfig/mconf
scripts/kconfig/mconf arch/or32/Kconfig
drivers/macintosh/Kconfig:121:warning: 'select' used by config symbol
'PMAC_APM_EMU' refers to undefined symbol 'APM_EMULATION'
#
# configuration written to .config
#

I also got some warnings when doing the main build:

$ make vmlinux ARCH=or32 CROSS_COMPILE=/opt/or32/bin/or32-uclinux-
  HOSTLD  scripts/kconfig/conf
scripts/kconfig/conf -s arch/or32/Kconfig
drivers/macintosh/Kconfig:121:warning: 'select' used by config symbol
'PMAC_APM_EMU' refers to undefined symbol 'APM_EMULATION'
  CHK     include/linux/version.h
  UPD     include/linux/version.h
  CHK     include/linux/utsrelease.h
  UPD     include/linux/utsrelease.h
  SYMLINK include/asm -> include/asm-or32
  CC      arch/or32/kernel/asm-offsets.s
  GEN     include/asm-or32/asm-offsets.h
  CALL    scripts/checksyscalls.sh
<stdin>:101:2: warning: #warning syscall restart_syscall not implemented
<stdin>:1345:2: warning: #warning syscall sync_file_range not
implemented
<stdin>:1369:2: warning: #warning syscall utimensat not implemented
<stdin>:1373:2: warning: #warning syscall signalfd not implemented
<stdin>:1377:2: warning: #warning syscall timerfd not implemented
<stdin>:1381:2: warning: #warning syscall eventfd not implemented
<stdin>:1385:2: warning: #warning syscall fallocate not implemented
  CC      scripts/mod/empty.o
  HOSTCC  scripts/mod/mk_elfconfig
  MKELF   scripts/mod/elfconfig.h

...

  LD      arch/or32/lib/built-in.o
  CC      arch/or32/kernel/setup.o
arch/or32/kernel/setup.c:396: warning: function declaration isn't a
prototype
arch/or32/kernel/setup.c:397: warning: function declaration isn't a
prototype
  AS      arch/or32/kernel/misc.o
  CC      arch/or32/kernel/idle.o

...

  CC      arch/or32/kernel/time.o
  CC      arch/or32/kernel/irq.o
arch/or32/kernel/irq.c: In function `request_irq':
arch/or32/kernel/irq.c:225: warning: assignment from incompatible
pointer type
  AS      arch/or32/kernel/entry.o
  CC      arch/or32/kernel/ptrace.o
arch/or32/kernel/ptrace.c:95: warning: 'set_singlestep' defined but not
used
  CC      arch/or32/kernel/signal.o
  CC      arch/or32/kernel/sys_or32.o

...

  LD      arch/or32/drivers/built-in.o
  CC      arch/or32/board/config.o
arch/or32/board/config.c:133: warning: initialization from incompatible
pointer type
  LD      arch/or32/board/built-in.o
gcc -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -o
arch/or32/support/tools/bintoc arch/or32/support/tools/bintoc.c
arch/or32/support/tools/bintoc.c:6: warning: return type defaults to
‘int’
arch/or32/support/tools/bintoc.c: In function ‘main’:
arch/or32/support/tools/bintoc.c:13: warning: implicit declaration of
function ‘exit’
arch/or32/support/tools/bintoc.c:13: warning: incompatible implicit
declaration of built-in function ‘exit’
arch/or32/support/tools/bintoc.c:24: warning: implicit declaration of
function ‘read’
arch/or32/support/tools/bintoc.c:55: warning: incompatible implicit
declaration of built-in function ‘exit’
arch/or32/support/tools/bintoc .initrd <
arch/or32/support/initrd-fb-03.ext2 |/opt/or32/bin/or32-uclinux-as -o
arch/or32/support/initrd.o
  LD      arch/or32/support/built-in.o
  CC      kernel/sched.o

...


  CC      kernel/time/timekeeping.o
  CC      kernel/time/ntp.o
kernel/time/ntp.c: In function `do_adjtimex':
kernel/time/ntp.c:352: warning: comparison of distinct pointer types
lacks a cast
kernel/time/ntp.c:355: warning: comparison of distinct pointer types
lacks a cast
  CC      kernel/time/clocksource.o
  CC      kernel/time/jiffies.o

...

  CC      mm/rmap.o
  CC      mm/vmalloc.o
mm/vmalloc.c: In function `unmap_kernel_range':
mm/vmalloc.c:75: warning: unused variable `start'
  CC      mm/bounce.o
  CC      mm/tiny-shmem.o

...

  CC      drivers/char/selection.o
  CC      drivers/char/keyboard.o
drivers/char/keyboard.c:1125:2: warning: #warning "Cannot generate
rawmode keyboard for your architecture yet."
  CC      drivers/char/vt.o
  SHIPPED drivers/char/defkeymap.c
  CC      drivers/char/defkeymap.o

...

  CC      drivers/serial/serial_core.o
  CC      drivers/serial/8250.o
drivers/serial/8250.c: In function `serial8250_shutdown':
drivers/serial/8250.c:1951: warning: suggest parentheses around
arithmetic in operand of |
  CC      drivers/serial/8250_early.o
  LD      drivers/serial/built-in.o

...

  CC      lib/vsprintf.o
  AR      lib/lib.a
  LD      vmlinux.o
  MODPOST vmlinux.o
WARNING: vmlinux.o(.text+0x21fc): Section mismatch: reference
to .init.text:_start_kernel (between 'jump_start_kernel' and
'_mc_init_1')
WARNING: vmlinux.o(.text+0x2200): Section mismatch: reference
to .init.text:_start_kernel (between 'jump_start_kernel' and
'_mc_init_1')
WARNING: vmlinux.o(.text+0xdad8): Section mismatch: reference
to .init.data:___setup_str_nosoftlockup_setup (between '___ioremap' and
'_iounmap')
WARNING: vmlinux.o(.text+0xdadc): Section mismatch: reference
to .init.data:___setup_str_nosoftlockup_setup (between '___ioremap' and
'_iounmap')
WARNING: vmlinux.o(.text+0xdb2c): Section mismatch: reference
to .init.data:___setup_str_nosoftlockup_setup (between '___ioremap' and
'_iounmap')
WARNING: vmlinux.o(.text+0xdb30): Section mismatch: reference
to .init.data:___setup_str_nosoftlockup_setup (between '___ioremap' and
'_iounmap')
WARNING: vmlinux.o(.text+0xdc48): Section mismatch: reference
to .init.data:___setup_str_nosoftlockup_setup (between '_iounmap' and
'_ioport_map')
WARNING: vmlinux.o(.text+0xdc4c): Section mismatch: reference
to .init.data:___setup_str_nosoftlockup_setup (between '_iounmap' and
'_ioport_map')
  GEN     .version
  CHK     include/linux/compile.h
  UPD     include/linux/compile.h
  CC      init/version.o
  LD      init/built-in.o
  LD      vmlinux
  SYSMAP  System.map
/opt/or32/bin/or32-uclinux-objcopy -O binary vmlinux vmlinux.bin

ATB,


Jeremy

--
Tel:      +44 (1202) 416955
Cell:     +44 (7970) 676050
SkypeID: jeremybennett
Email:   jeremy.bennett@...
Web:     www.embecosm.com


_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Re: linux-2.6.24

by xianfeng zeng :: Rate this Message:

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Hi Rich,

Thank you for your upgrade.

I tried this new path with or1ksim 0.2, but got a unhandled exception returns, like this

[xzeng@ulab linux-2.6.24]$ or32-uclinux-sim -f sim.cfg vmlinux
Reading script file from 'sim.cfg'...
WARNING: config.memory: Invalid parameter: bus; ignoring.

WARNING: config.memory: Invalid parameter: bus; ignoring.

WARNING: config.memory: Invalid parameter: bus; ignoring.

WARNING: config.immu: Invalid parameter: bus; ignoring.

WARNING: config.dmmu: Invalid parameter: bus; ignoring.

WARNING: config.ic: Invalid parameter: bus; ignoring.

WARNING: config.dc: Invalid parameter: bus; ignoring.

WARNING: config.cpu: Invalid parameter: bus; ignoring.

WARNING: config.cpu: Invalid parameter: dbus; ignoring.

WARNING: config.pm: Invalid parameter: bus; ignoring.

WARNING: config.debug: Invalid parameter: bus; ignoring.

WARNING: config.mc: Invalid parameter: bus; ignoring.

WARNING: config.uart: Invalid parameter: bus; ignoring.

WARNING: config.dma: Invalid parameter: bus; ignoring.

WARNING: config.ethernet: Invalid parameter: bus; ignoring.

WARNING: config.gpio: Invalid parameter: bus; ignoring.

WARNING: config.vga: Invalid parameter: bus; ignoring.

WARNING: config: Unknown section: tick; ignoring.
WARNING: config: Unknown section: pic; ignoring.
WARNING: config.fb: Invalid parameter: bus; ignoring.

WARNING: config.kbd: Invalid parameter: bus; ignoring.

WARNING: config.ata: Invalid parameter: bus; ignoring.

Verbose on, simdebug off, interactive prompt off
Machine initialization...
Clock cycle: 10us
No data cache.
No instruction cache.
BPB simulation off.
BTIC simulation off.
Building automata... done, num uncovered: 0/213.
Parsing operands data... done.
loadcode: filename vmlinux  startaddr=00000000  virtphy_transl=00000000
Not COFF file format
ELF type: 0x0002
ELF machine: 0x005c
ELF version: 0x00000001
ELF sec = 52
Section: .text, vaddr: 0xc0000000, paddr: 0xf0000000 offset: 0x00002000, size: 0x001ca5bc
Section: .text.init.refok, vaddr: 0xc01ca5bc, paddr: 0xf01ca5bc offset: 0x001cc5bc, size: 0x000003c0
Section: .exit.text.refok, vaddr: 0xc01ca97c, paddr: 0xf01ca97c offset: 0x001cc97c, size: 0x000001fc
Section: .rodata, vaddr: 0xc01cb000, paddr: 0xf01cb000 offset: 0x001cd000, size: 0x00023464
Section: __param, vaddr: 0xc01ee464, paddr: 0xf01ee464 offset: 0x001f0464, size: 0x000001f4
Section: __ex_table, vaddr: 0xc01ef000, paddr: 0xf01ef000 offset: 0x001f1000, size: 0x00000bd8
Section: .data, vaddr: 0xc01f0000, paddr: 0xf01f0000 offset: 0x001f2000, size: 0x00016de0
Section: .data.cacheline_aligned, vaddr: 0xc0206de0, paddr: 0xf0206de0 offset: 0x00208de0, size: 0x000000e0
Section: .data.init_task, vaddr: 0xc0208000, paddr: 0xf0208000 offset: 0x0020a000, size: 0x00002000
Section: .init.text, vaddr: 0xc020a000, paddr: 0xf020a000 offset: 0x0020c000, size: 0x00016ac0
Section: .init.data, vaddr: 0xc0220ac0, paddr: 0xf0220ac0 offset: 0x00222ac0, size: 0x000008bc
Section: .init.setup, vaddr: 0xc0221380, paddr: 0xf0221380 offset: 0x00223380, size: 0x00000234
Section: .initcall.init, vaddr: 0xc02215b4, paddr: 0xf02215b4 offset: 0x002235b4, size: 0x00000180
Section: .con_initcall.init, vaddr: 0xc0221734, paddr: 0xf0221734 offset: 0x00223734, size: 0x00000008
Section: .init.ramfs, vaddr: 0xc0222000, paddr: 0xf0222000 offset: 0x00224000, size: 0x00002000
Section: .initrd, vaddr: 0xc0224000, paddr: 0xf0224000 offset: 0x00226000, size: 0x00200000
WARNING: dependstats stats must be enabled to do history analisis.
WARNING: Unable to open RX file stream.
Cannot open Ethernet RX file "eth0.rx"
UART at 0x90000000
Resetting memory controller.
Resetting Tick Timer.
Resetting Power Management.
Resetting PIC.
Starting at 0x00000000





Copying Linux... Ok, booting the kernel.
****************** counters reset ******************
cycles 132648746, insn #9127627
****************** counters reset ******************

Runarunaround: Unhandled exception 0x600: EPC=0xc0008518
exit(34417)
@reset : cycles 132648746, insn #9127627
@exit  : cycles 253422170, insn #14064571
 diff  : cycles 120773424, insn #4936944
[xzeng@ulab linux-2.6.24]$
 

[xzeng@ulab linux-2.6.24]$ or32-uclinux-gcc -v
Reading specs from /workspace/xzeng/OpenRISC/build/tools/or32-uclinux/lib/gcc/or32-uclinux/3.4.4/specs
Configured with: /workspace/xzeng/OpenRISC/build/gcc-3.4.4/configure --target=or32-uclinux --prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux --with-local-prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/or32-uclinux --enable-languages=c : (reconfigured) /workspace/xzeng/OpenRISC/build/gcc-3.4.4/configure --target=or32-uclinux --prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux --with-local-prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/or32-uclinux --enable-languages=c
Thread model: single
gcc version 3.4.4
[xzeng@ulab linux-2.6.24]$


Is there anything I missed?

Thanks
--Xianfeng

On Mon, Feb 23, 2009 at 3:25 AM, <rich_daddio@...> wrote:
Hi All,
linux-2.6.24 patch for or32 is finally avaiable for use only tested on
sim as usual:

To get it:
ftp www.meansoffreedom.com
user: download
pw: download

cd mof_orsoc

get linux_2.6.24_or32_unified_simtested.bz2

Shout out to Stefan a friend of ORSoC for tracking down an
inconsistency between kernel and uclibc.

Also, I am hoping to "catch-up" to more recent kernel releases if any
one has time to track down the usual upgrade bugs & etc. plus test
please contact us.

Enjoy,

Rich d
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc





_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Parent Message unknown Re: linux-2.6.24

by rich_daddio :: Rate this Message:

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Hi Xianfeng,
Thanks for testing this, I only tested this with sim version 0.2.0-rc2
which was packaged with one of the older scripts but I had no
problems. Jeremy reported a similar problem. I will retest and see if
I can reproduce. Can you send me your 2.6.24 .config as well:
rich_daddio@....

Thanks & BR,

Rich d
----- Original Message -----
From: xianfeng zeng<xianfeng.zeng@g...>
To:
Date: Mon Feb 23 17:31:18 CET 2009
Subject: [openrisc] linux-2.6.24

> Hi Rich,
>
> Thank you for your upgrade.
>
> I tried this new path with or1ksim 0.2, but got a unhandled
> exception
> returns, like this
> [attachment.html linux-2.6.24]$ or32-uclinux-sim -f sim.cfg vmlinux
> Reading script file from 'sim.cfg'...
> WARNING: config.memory: Invalid parameter: bus; ignoring.
> WARNING: config.memory: Invalid parameter: bus; ignoring.
> WARNING: config.memory: Invalid parameter: bus; ignoring.
> WARNING: config.immu: Invalid parameter: bus; ignoring.
> WARNING: config.dmmu: Invalid parameter: bus; ignoring.
> WARNING: config.ic: Invalid parameter: bus; ignoring.
> WARNING: config.dc: Invalid parameter: bus; ignoring.
> WARNING: config.cpu: Invalid parameter: bus; ignoring.
> WARNING: config.cpu: Invalid parameter: dbus; ignoring.
> WARNING: config.pm: Invalid parameter: bus; ignoring.
> WARNING: config.debug: Invalid parameter: bus; ignoring.
> WARNING: config.mc: Invalid parameter: bus; ignoring.
> WARNING: config.uart: Invalid parameter: bus; ignoring.
> WARNING: config.dma: Invalid parameter: bus; ignoring.
> WARNING: config.ethernet: Invalid parameter: bus; ignoring.
> WARNING: config.gpio: Invalid parameter: bus; ignoring.
> WARNING: config.vga: Invalid parameter: bus; ignoring.
> WARNING: config: Unknown section: tick; ignoring.
> WARNING: config: Unknown section: pic; ignoring.
> WARNING: config.fb: Invalid parameter: bus; ignoring.
> WARNING: config.kbd: Invalid parameter: bus; ignoring.
> WARNING: config.ata: Invalid parameter: bus; ignoring.
> Verbose on, simdebug off, interactive prompt off
> Machine initialization...
> Clock cycle: 10us
> No data cache.
> No instruction cache.
> BPB simulation off.
> BTIC simulation off.
> Building automata... done, num uncovered: 0/213.
> Parsing operands data... done.
> loadcode: filename vmlinux startaddr=00000000
> virtphy_transl=00000000
> Not COFF file format
> ELF type: 0x0002
> ELF machine: 0x005c
> ELF version: 0x00000001
> ELF sec = 52
> Section: .text, vaddr: 0xc0000000, paddr: 0xf0000000 offset:
> 0x00002000,
> size: 0x001ca5bc
> Section: .text.init.refok, vaddr: 0xc01ca5bc, paddr: 0xf01ca5bc
> offset:
> 0x001cc5bc, size: 0x000003c0
> Section: .exit.text.refok, vaddr: 0xc01ca97c, paddr: 0xf01ca97c
> offset:
> 0x001cc97c, size: 0x000001fc
> Section: .rodata, vaddr: 0xc01cb000, paddr: 0xf01cb000 offset:
> 0x001cd000,
> size: 0x00023464
> Section: __param, vaddr: 0xc01ee464, paddr: 0xf01ee464 offset:
> 0x001f0464,
> size: 0x000001f4
> Section: __ex_table, vaddr: 0xc01ef000, paddr: 0xf01ef000 offset:
> 0x001f1000, size: 0x00000bd8
> Section: .data, vaddr: 0xc01f0000, paddr: 0xf01f0000 offset:
> 0x001f2000,
> size: 0x00016de0
> Section: .data.cacheline_aligned, vaddr: 0xc0206de0, paddr:
> 0xf0206de0
> offset: 0x00208de0, size: 0x000000e0
> Section: .data.init_task, vaddr: 0xc0208000, paddr: 0xf0208000
> offset:
> 0x0020a000, size: 0x00002000
> Section: .init.text, vaddr: 0xc020a000, paddr: 0xf020a000 offset:
> 0x0020c000, size: 0x00016ac0
> Section: .init.data, vaddr: 0xc0220ac0, paddr: 0xf0220ac0 offset:
> 0x00222ac0, size: 0x000008bc
> Section: .init.setup, vaddr: 0xc0221380, paddr: 0xf0221380 offset:
> 0x00223380, size: 0x00000234
> Section: .initcall.init, vaddr: 0xc02215b4, paddr: 0xf02215b4
> offset:
> 0x002235b4, size: 0x00000180
> Section: .con_initcall.init, vaddr: 0xc0221734, paddr: 0xf0221734
> offset:
> 0x00223734, size: 0x00000008
> Section: .init.ramfs, vaddr: 0xc0222000, paddr: 0xf0222000 offset:
> 0x00224000, size: 0x00002000
> Section: .initrd, vaddr: 0xc0224000, paddr: 0xf0224000 offset:
> 0x00226000,
> size: 0x00200000
> WARNING: dependstats stats must be enabled to do history analisis.
> WARNING: Unable to open RX file stream.
> Cannot open Ethernet RX file "eth0.rx"
> UART at 0x90000000
> Resetting memory controller.
> Resetting Tick Timer.
> Resetting Power Management. Resetting PIC. Starting at 0x00000000
> Copying Linux... Ok, booting the kernel. ******************
> counters reset ****************** cycles 132648746, insn #9127627
> ****************** counters reset ****************** Runarunaround:
> Unhandled exception 0x600: EPC=0xc0008518 exit(34417) @reset :
> cycles 132648746, insn #9127627 @exit : cycles 253422170, insn
> #14064571 diff : cycles 120773424, insn #4936944 [attachment.html
> linux-2.6.24]$ [attachment.html linux-2.6.24]$ or32-uclinux-gcc -v
> Reading specs from
>
/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/lib/gcc/or32-uclinux/3.4.4/specs

> Configured with:
> /workspace/xzeng/OpenRISC/build/gcc-3.4.4/configure
> --target=or32-uclinux
> --prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux
>
--with-local-prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/or32-uclinux

> --enable-languages=c : (reconfigured)
> /workspace/xzeng/OpenRISC/build/gcc-3.4.4/configure
> --target=or32-uclinux
> --prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux
>
--with-local-prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/or32-uclinux

> --enable-languages=c Thread model: single gcc version 3.4.4
> [attachment.html linux-2.6.24]$ Is there anything I missed? Thanks
> --Xianfeng On Mon, Feb 23, 2009 at 3:25 AM, <attachment.html>
> wrote: > Hi All, > linux-2.6.24 patch for or32 is finally
> avaiable for use only tested on > sim as usual: > > To get
> it: > ftp www.meansoffreedom.com > user: download > pw:
> download > > cd mof_orsoc > > get
> linux_2.6.24_or32_unified_simtested.bz2 > > Shout out to
> Stefan a friend of ORSoC for tracking down an > inconsistency
> between kernel and uclibc. > > Also, I am hoping to
> "catch-up" to more recent kernel releases if any > one
> has time to track down the usual upgrade bugs & etc. plus test
> > please contact us. > > Enjoy, > > Rich d >
> _______________________________________________ >
> attachment.html > -------------- next part -------------- An
> HTML attachment was scrubbed... URL: attachment.html
>
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Re: linux-2.6.24

by xianfeng zeng :: Rate this Message:

Reply to Author | View Threaded | Show Only this Message

Hi Rish,

I just used the .config that is located in the patch and it is also attached. In addition, I'm using or1ksim 0.2 + patch2.

My steps like this:

1. Download linux 2.6.24 from kernel.org
2. Get linux_2.6.24_or32_unified_simtested.bz2 from your ftp and patch to 2.6.24
3. Modified Makefile
     Change

               CROSS_COMPILE   = or32-elf-

     To

               CROSS_COMPILE   = or32-uclinux-

4. make oldconfig
5. make vmlinux
6. or32-uclinux-sim -f sim.cfg vmlinux

Thanks,
--Xianfeng

On Tue, Feb 24, 2009 at 8:34 PM, <rich_daddio@...> wrote:
Hi Xianfeng,
Thanks for testing this, I only tested this with sim version 0.2.0-rc2
which was packaged with one of the older scripts but I had no
problems. Jeremy reported a similar problem. I will retest and see if
I can reproduce. Can you send me your 2.6.24 .config as well:
rich_daddio@....

Thanks & BR,

Rich d
----- Original Message -----
From: xianfeng zeng<xianfeng.zeng@g...>
To:
Date: Mon Feb 23 17:31:18 CET 2009
Subject: [openrisc] linux-2.6.24

> Hi Rich,
>
> Thank you for your upgrade.
>
> I tried this new path with or1ksim 0.2, but got a unhandled
> exception
> returns, like this
> [attachment.html linux-2.6.24]$ or32-uclinux-sim -f sim.cfg vmlinux
> Reading script file from 'sim.cfg'...
> WARNING: config.memory: Invalid parameter: bus; ignoring.
> WARNING: config.memory: Invalid parameter: bus; ignoring.
> WARNING: config.memory: Invalid parameter: bus; ignoring.
> WARNING: config.immu: Invalid parameter: bus; ignoring.
> WARNING: config.dmmu: Invalid parameter: bus; ignoring.
> WARNING: config.ic: Invalid parameter: bus; ignoring.
> WARNING: config.dc: Invalid parameter: bus; ignoring.
> WARNING: config.cpu: Invalid parameter: bus; ignoring.
> WARNING: config.cpu: Invalid parameter: dbus; ignoring.
> WARNING: config.pm: Invalid parameter: bus; ignoring.
> WARNING: config.debug: Invalid parameter: bus; ignoring.
> WARNING: config.mc: Invalid parameter: bus; ignoring.
> WARNING: config.uart: Invalid parameter: bus; ignoring.
> WARNING: config.dma: Invalid parameter: bus; ignoring.
> WARNING: config.ethernet: Invalid parameter: bus; ignoring.
> WARNING: config.gpio: Invalid parameter: bus; ignoring.
> WARNING: config.vga: Invalid parameter: bus; ignoring.
> WARNING: config: Unknown section: tick; ignoring.
> WARNING: config: Unknown section: pic; ignoring.
> WARNING: config.fb: Invalid parameter: bus; ignoring.
> WARNING: config.kbd: Invalid parameter: bus; ignoring.
> WARNING: config.ata: Invalid parameter: bus; ignoring.
> Verbose on, simdebug off, interactive prompt off
> Machine initialization...
> Clock cycle: 10us
> No data cache.
> No instruction cache.
> BPB simulation off.
> BTIC simulation off.
> Building automata... done, num uncovered: 0/213.
> Parsing operands data... done.
> loadcode: filename vmlinux startaddr=00000000
> virtphy_transl=00000000
> Not COFF file format
> ELF type: 0x0002
> ELF machine: 0x005c
> ELF version: 0x00000001
> ELF sec = 52
> Section: .text, vaddr: 0xc0000000, paddr: 0xf0000000 offset:
> 0x00002000,
> size: 0x001ca5bc
> Section: .text.init.refok, vaddr: 0xc01ca5bc, paddr: 0xf01ca5bc
> offset:
> 0x001cc5bc, size: 0x000003c0
> Section: .exit.text.refok, vaddr: 0xc01ca97c, paddr: 0xf01ca97c
> offset:
> 0x001cc97c, size: 0x000001fc
> Section: .rodata, vaddr: 0xc01cb000, paddr: 0xf01cb000 offset:
> 0x001cd000,
> size: 0x00023464
> Section: __param, vaddr: 0xc01ee464, paddr: 0xf01ee464 offset:
> 0x001f0464,
> size: 0x000001f4
> Section: __ex_table, vaddr: 0xc01ef000, paddr: 0xf01ef000 offset:
> 0x001f1000, size: 0x00000bd8
> Section: .data, vaddr: 0xc01f0000, paddr: 0xf01f0000 offset:
> 0x001f2000,
> size: 0x00016de0
> Section: .data.cacheline_aligned, vaddr: 0xc0206de0, paddr:
> 0xf0206de0
> offset: 0x00208de0, size: 0x000000e0
> Section: .data.init_task, vaddr: 0xc0208000, paddr: 0xf0208000
> offset:
> 0x0020a000, size: 0x00002000
> Section: .init.text, vaddr: 0xc020a000, paddr: 0xf020a000 offset:
> 0x0020c000, size: 0x00016ac0
> Section: .init.data, vaddr: 0xc0220ac0, paddr: 0xf0220ac0 offset:
> 0x00222ac0, size: 0x000008bc
> Section: .init.setup, vaddr: 0xc0221380, paddr: 0xf0221380 offset:
> 0x00223380, size: 0x00000234
> Section: .initcall.init, vaddr: 0xc02215b4, paddr: 0xf02215b4
> offset:
> 0x002235b4, size: 0x00000180
> Section: .con_initcall.init, vaddr: 0xc0221734, paddr: 0xf0221734
> offset:
> 0x00223734, size: 0x00000008
> Section: .init.ramfs, vaddr: 0xc0222000, paddr: 0xf0222000 offset:
> 0x00224000, size: 0x00002000
> Section: .initrd, vaddr: 0xc0224000, paddr: 0xf0224000 offset:
> 0x00226000,
> size: 0x00200000
> WARNING: dependstats stats must be enabled to do history analisis.
> WARNING: Unable to open RX file stream.
> Cannot open Ethernet RX file "eth0.rx"
> UART at 0x90000000
> Resetting memory controller.
> Resetting Tick Timer.
> Resetting Power Management. Resetting PIC. Starting at 0x00000000
> Copying Linux... Ok, booting the kernel. ******************
> counters reset ****************** cycles 132648746, insn #9127627
> ****************** counters reset ****************** Runarunaround:
> Unhandled exception 0x600: EPC=0xc0008518 exit(34417) @reset :
> cycles 132648746, insn #9127627 @exit : cycles 253422170, insn
> #14064571 diff : cycles 120773424, insn #4936944 [attachment.html
> linux-2.6.24]$ [attachment.html linux-2.6.24]$ or32-uclinux-gcc -v
> Reading specs from
>
/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/lib/gcc/or32-uclinux/3.4.4/specs

> Configured with:
> /workspace/xzeng/OpenRISC/build/gcc-3.4.4/configure
> --target=or32-uclinux
> --prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux
>
--with-local-prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/or32-uclinux

> --enable-languages=c : (reconfigured)
> /workspace/xzeng/OpenRISC/build/gcc-3.4.4/configure
> --target=or32-uclinux
> --prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux
>
--with-local-prefix=/workspace/xzeng/OpenRISC/build/tools/or32-uclinux/or32-uclinux

> --enable-languages=c Thread model: single gcc version 3.4.4
> [attachment.html linux-2.6.24]$ Is there anything I missed? Thanks
> --Xianfeng On Mon, Feb 23, 2009 at 3:25 AM, <attachment.html>
> wrote: > Hi All, > linux-2.6.24 patch for or32 is finally
> avaiable for use only tested on > sim as usual: > > To get
> it: > ftp www.meansoffreedom.com > user: download > pw:
> download > > cd mof_orsoc > > get
> linux_2.6.24_or32_unified_simtested.bz2 > > Shout out to
> Stefan a friend of ORSoC for tracking down an > inconsistency
> between kernel and uclibc. > > Also, I am hoping to
> "catch-up" to more recent kernel releases if any > one
> has time to track down the usual upgrade bugs & etc. plus test
> > please contact us. > > Enjoy, > > Rich d >
> _______________________________________________ >
> attachment.html > -------------- next part -------------- An
> HTML attachment was scrubbed... URL: attachment.html
>



--
Thanks & Best Regards,

->Xianfeng Zeng


_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

.config (18K) Download Attachment

Re: linux-2.6.24

by Florian Fainelli-5 :: Rate this Message:

Reply to Author | View Threaded | Show Only this Message

Hi Rich,

Le Sunday 22 February 2009 20:25:51 rich_daddio@..., vous avez écrit :

> Hi All,
> linux-2.6.24 patch for or32 is finally avaiable for use only tested on
> sim as usual:
>
> To get it:
> ftp www.meansoffreedom.com
> user: download
> pw: download
>
> cd mof_orsoc
>
> get linux_2.6.24_or32_unified_simtested.bz2
>
> Shout out to Stefan a friend of ORSoC for tracking down an
> inconsistency between kernel and uclibc.
>
> Also, I am hoping to "catch-up" to more recent kernel releases if any
> one has time to track down the usual upgrade bugs & etc. plus test
> please contact us.
Works great here in simulator with no regression so far.

Which prefered method do you want to want to catch-up with newer kernels ?
Does something like mailing you the patch sounds ok with you ?
--
Cordialement, Florian Fainelli

OpenPattern SARL - Lead software architect
GSM: +33.632843955
109/111 rue des Côtes
78 600 Maisons-Laffitte
France
------------------------------


_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

signature.asc (204 bytes) Download Attachment

Re: linux-2.6.24

by rich_daddio :: Rate this Message:

Reply to Author | View Threaded | Show Only this Message

Hi Florian

Patch would be great and a quick summary of changes/cleans & etc.

Also, if you could let us know(either private mail or on list) which kernel release you want to work on in advance, that would be great. Then we coordinate and not have duplicate efforts.

Thanks & BR,

Rich d

--- On Tue, 2/24/09, Florian Fainelli <florian.fainelli@...> wrote:
From: Florian Fainelli <florian.fainelli@...>
Subject: Re: [openrisc] linux-2.6.24
To: openrisc@...
Cc: rich_daddio@...
Date: Tuesday, February 24, 2009, 2:02 PM

Hi Rich,

Le Sunday 22 February 2009 20:25:51 rich_daddio@..., vous avez écrit :

> Hi All,
> linux-2.6.24 patch for or32 is finally avaiable for use only tested on
> sim as usual:
>
> To get it:
> ftp www.meansoffreedom.com
> user: download
> pw: download
>
> cd mof_orsoc
>
> get linux_2.6.24_or32_unified_simtested.bz2
>
> Shout out to Stefan a friend of ORSoC for tracking down an
> inconsistency between kernel and uclibc.
>
> Also, I am hoping to "catch-up" to more recent kernel releases
if any
> one has time to track down the usual upgrade bugs & etc. plus test
> please contact us.

Works great here in simulator with no regression so far.

Which prefered method do you want to want to catch-up with newer kernels ?
Does something like mailing you the patch sounds ok with you ?
--
Cordialement, Florian Fainelli

OpenPattern SARL - Lead software architect
GSM: +33.632843955
109/111 rue des Côtes
78 600 Maisons-Laffitte
France
------------------------------


_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

Re: linux-2.6.24

by Jeremy Bennett-4 :: Rate this Message:

Reply to Author | View Threaded | Show Only this Message

On Tue, 2009-02-24 at 14:39 -0800, Rich DAddio wrote:
> Hi Florian
>
> Patch would be great and a quick summary of changes/cleans & etc.
>
> Also, if you could let us know(either private mail or on list) which
> kernel release you want to work on in advance, that would be great.
> Then we coordinate and not have duplicate efforts.
>
>

Hi Rich, Florian,

As promised, here is a tidied up sim.cfg for use with linux 2.6.24 and
the current Or1ksim. I've got rid of obsolete entries which generate
warnings. I've also turned off the Or1ksim logging. You'll see it now
boots 10x quicker (not logging details of every instruction executed
really helps!).

ATB,


Jeremy
--
Tel:      +44 (1202) 416955
Cell:     +44 (7970) 676050
SkypeID: jeremybennett
Email:   jeremy.bennett@...
Web:     www.embecosm.com


[sim-fixed-0.3.0rc3.cfg]

/* sim.cfg -- Simulator configuration script file
   Copyright (C) 2001-2002, Marko Mlinar, markom@...

This file is part of OpenRISC 1000 Architectural Simulator.
It contains the default configuration and help about configuring
the simulator.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */


/* INTRODUCTION

   The ork1sim has various parameters, that are set in configuration files
   like this one. The user can switch between configurations at startup by
   specifying the required configuration file with the -f <filename.cfg> option.
   If no configuration file is specified or1ksim searches for the default
   configuration file sim.cfg. First it searches for './sim.cfg'. If this
   file is not found, it searches for '~/or1k/sim.cfg'. If this file is
   not found too, it reverts to the built-in default configuration.
   
   NOTE: Users should not rely on the built-in configuration, since the
         default configuration may differ between version.
         Rather create a configuration file that sets all critical values.

   This file may contain (standard C) comments only - no // support.
   
   Configure files may be be included, using:
   include "file_name_to_include"

   Like normal configuration files, the included file is divided into
   sections. Each section is described in detail also.

   Some section have subsections. One example of such a subsection is:

   device <index>
     instance specific parameters...
   enddevice

   which creates a device instance.
*/


/* MEMORY SECTION

   This section specifies how the memory is generated and the blocks
   it consists of.

   type = random/unknown/pattern
      Specifies the initial memory values.
      'random' generates random memory using seed 'random_seed'.
      'pattern' fills memory with 'pattern'.
      'unknown' does not specify how memory should be generated,
      leaving the memory in a undefined state. This is the fastest
      option.

   random_seed = <value>
      random seed for randomizer, used if type = 'random'.

   pattern = <value>
      pattern to fill memory, used if type = 'pattern'.

   nmemories = <value>
      number of memory instances connected

   baseaddr = <hex_value>
      memory start address

   size = <hex_value>
      memory size

   name = "<string>"
      memory block name

   ce = <value>
      chip enable index of the memory instance

   mc = <value>
      memory controller this memory is connected to

   delayr = <value>
      cycles, required for read access, -1 if instance does not support reading

   delayw = <value>
      cycles, required for write access, -1 if instance does not support writing

   log = "<filename>"
      filename, where to log memory accesses to, no log, if log command is not specified
*/


section memory
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "FLASH"
  ce = 0
  mc = 0
  baseaddr = 0xf0000000
  size = 0x01000000
  delayr = 10
  delayw = -1
end

section memory
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "RAM"
  ce = 1
  mc = 0
  baseaddr = 0x00000000
  size = 0x02000000
  delayr = 20
  delayw = 25
end

section memory
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "SRAM"
  mc = 0
  ce = 2
  baseaddr = 0xa4000000
  size = 0x00100000
  delayr = 1
  delayw = 2
end


/* IMMU SECTION

    This section configures the Instruction Memory Manangement Unit

    enabled = 0/1
       '0': disabled
       '1': enabled
       (NOTE: UPR bit is set)

    nsets = <value>
       number of ITLB sets; must be power of two

    nways = <value>
       number of ITLB ways

    pagesize = <value>
       instruction page size; must be power of two

    entrysize = <value>
       instruction entry size in bytes

    ustates = <value>
       number of ITLB usage states (2, 3, 4 etc., max is 4)
       
    hitdelay = <value>
       number of cycles immu hit costs
   
    missdelay = <value>
       number of cycles immu miss costs
*/

section immu
  enabled = 1
  nsets = 64
  nways = 1
  pagesize = 8192
  hitdelay = 0
  missdelay = 0
end


/* DMMU SECTION

    This section configures the Data Memory Manangement Unit

    enabled = 0/1
       '0': disabled
       '1': enabled
       (NOTE: UPR bit is set)

    nsets = <value>
       number of DTLB sets; must be power of two

    nways = <value>
       number of DTLB ways

    pagesize = <value>
       data page size; must be power of two

    entrysize = <value>
       data entry size in bytes

    ustates = <value>
       number of DTLB usage states (2, 3, 4 etc., max is 4)

    hitdelay = <value>
       number of cycles dmmu hit costs

    missdelay = <value>
       number of cycles dmmu miss costs
*/

section dmmu
  enabled = 1
  nsets = 64
  nways = 1
  pagesize = 8192
  hitdelay = 0
  missdelay = 0
end


/* IC SECTION

   This section configures the Instruction Cache

   enabled = 0/1
       '0': disabled
       '1': enabled
      (NOTE: UPR bit is set)

   nsets = <value>
      number of IC sets; must be power of two

   nways = <value>
      number of IC ways

   blocksize = <value>
      IC block size in bytes; must be power of two

   ustates = <value>
      number of IC usage states (2, 3, 4 etc., max is 4)

   hitdelay = <value>
      number of cycles ic hit costs
   
    missdelay = <value>
      number of cycles ic miss costs
*/

section ic
  enabled = 0
  nsets = 512
  nways = 1
  blocksize = 16
  hitdelay = 20
  missdelay = 20
end


/* DC SECTION

   This section configures the Data Cache

   enabled = 0/1
       '0': disabled
       '1': enabled
      (NOTE: UPR bit is set)

   nsets = <value>
      number of DC sets; must be power of two

   nways = <value>
      number of DC ways

   blocksize = <value>
      DC block size in bytes; must be power of two

   ustates = <value>
      number of DC usage states (2, 3, 4 etc., max is 4)

   load_hitdelay = <value>
      number of cycles dc load hit costs
   
   load_missdelay = <value>
      number of cycles dc load miss costs
       
   store_hitdelay = <value>
      number of cycles dc load hit costs
   
   store_missdelay = <value>
      number of cycles dc load miss costs
*/

section dc
  enabled = 0
  nsets = 512
  nways = 1
  blocksize = 16
  load_hitdelay = 20
  load_missdelay = 20
  store_hitdelay = 20
  store_missdelay = 20
end


/* SIM SECTION

  This section specifies how or1ksim should behave.

  verbose = 0/1
       '0': don't print extra messages
       '1': print extra messages

  debug = 0-9
      0  : no debug messages
      1-9: debug message level.
           higher numbers produce more messages

  profile = 0/1
      '0': don't generate profiling file 'sim.profile'
      '1': don't generate profiling file 'sim.profile'

  prof_fn = "<filename>"
      optional filename for the profiling file.
      valid only if 'profile' is set
     
  mprofile = 0/1
      '0': don't generate memory profiling file 'sim.mprofile'
      '1': generate memory profiling file 'sim.mprofile'

  mprof_fn = "<filename>"
      optional filename for the memory profiling file.
      valid only if 'mprofile' is set

  history = 0/1
      '0': don't track execution flow
      '1': track execution flow
      Execution flow can be tracked for the simulator's
      'hist' command. Useful for back-trace debugging.

  iprompt = 0/1
     '0': start in <not interactive prompt> (so what do we start in ???)
     '1': start in interactive prompt.

  exe_log = 0/1
      '0': don't generate execution log.
      '1': generate execution log.
     
  exe_log = default/hardware/simple/software
      type of execution log, default is used when not specified
     
  exe_log_start = <value>
      index of first instruction to start logging, default = 0
       
  exe_log_end = <value>
      index of last instruction to end logging; not limited, if omitted
 
  exe_log_marker = <value>
      <value> specifies number of instructions before horizontal marker is
      printed; if zero, markers are disabled (default)

  exe_log_fn = "<filename>"
      filename for the exection log file.
      valid only if 'exe_log' is set

  clkcycle = <value>[ps|ns|us|ms]
      specifies time measurement for one cycle
*/

section sim
  verbose = 0
  debug = 0
  profile = 0
  history = 0

  clkcycle = 10ns
end


/* SECTION VAPI

    This section configures the Verification API, used for Advanced
    Core Verification.

    enabled = 0/1
        '0': disbable VAPI server
        '1': enable/start VAPI server

    server_port = <value>
        TCP/IP port to start VAPI server on

    log_enabled = 0/1
       '0': disable VAPI requests logging
       '1': enable VAPI requests logging

    hide_device_id = 0/1
       '0': don't log device id (for compatability with old version)
       '1': log device id
       

    vapi_fn = <filename>
       filename for the log file.
       valid only if log_enabled is set
*/

section VAPI
  enabled = 0
  server_port = 9998
  log_enabled = 0
  vapi_log_fn = "vapi.log"
end


/* CPU SECTION

   This section specifies various CPU parameters.

   ver = <value>
   rev = <value>
      specifies version and revision of the CPU used

   upr = <value>
      changes the upr register
     
   sr = <value>
      sets the initial Supervision Register value

   superscalar = 0/1
      '0': CPU is scalar
      '1': CPU is superscalar
      (modify cpu/or32/execute.c to tune superscalar model)

   hazards = 0/1
      '0': don't track data hazards in superscalar CPU
      '1': track data hazards in superscalar CPU
      If tracked, data hazards can be displayed using the
      simulator's 'r' command.

   dependstats = 0/1
      '0': don't calculate inter-instruction dependencies.
      '1': calculate inter-instruction dependencies.
      If calculated, inter-instruction dependencies can be
      displayed using the simulator's 'stat' command.

   sbuf_len = <value>
      length of store buffer (<= 256), 0 = disabled
*/

section cpu
  ver = 0x12
  cfg = 0x00
  rev = 0x01
  /* upr = */
  superscalar = 0
  hazards = 0
  dependstats = 0
  sbuf_len = 0
end


/* PM SECTION

   This section specifies Power Management parameters

   enabled = 0/1
      '0': disable power management
      '1': enable power management
*/

section pm
  enabled = 0
end


/* BPB SECTION

   This section specifies how branch prediction should behave.
   
   enabled = 0/1
     '0': disable branch prediction
     '1': enable branch prediction
     
   btic = 0/1
     '0': disable branch target instruction cache model
     '1': enable branch target instruction cache model

   sbp_bf_fwd = 0/1
     Static branch prediction for 'l.bf'
     '0': don't use forward prediction
     '1': use forward prediction
   
   sbp_bnf_fwd = 0/1
     Static branch prediction for 'l.bnf'
     '0': don't use forward prediction
     '1': use forward prediction

   hitdelay = <value>
       number of cycles bpb hit costs
   
   missdelay = <value>
       number of cycles bpb miss costs
*/

section bpb
  enabled = 0
  btic = 0
  sbp_bf_fwd = 0
  sbp_bnf_fwd = 0
  hitdelay = 0
  missdelay = 0
end


/* DEBUG SECTION

   This sections specifies how the debug unit should behave.

   enabled = 0/1
      '0': disable debug unit
      '1': enable debug unit

   gdb_enabled = 0/1
      '0': don't start gdb server
      '1': start gdb server at port 'server_port'

   server_port = <value>
      TCP/IP port to start gdb server on
      valid only if gdb_enabled is set

   vapi_id = <hex_value>
      Used to create "fake" vapi log file containing the JTAG proxy messages.
*/

section debug
  enabled = 0
  gdb_enabled = 0
  server_port = 9999
end


/* MC SECTION

   This section configures the memory controller

   enabled = 0/1
     '0': disable memory controller
     '1': enable memory controller

   baseaddr = <hex_value>
      address of first MC register

   POC = <hex_value>
      Power On Configuration register

   index = <value>
      Index of this memory controller amongst all the memory controllers
*/

section mc
  enabled = 1
  baseaddr = 0x93000000
  POC = 0x00000008                 /* Power on configuration register */
  index = 0
end


/* UART SECTION

   This section configures the UARTs

     enabled = <0|1>
        Enable/disable the peripheral.  By default if it is enabled.

     baseaddr = <hex_value>
        address of first UART register for this device

     
     channel = <channeltype>:<args>
     
        The channel parameter indicates the source of received UART characters
        and the sink for transmitted UART characters.

        The <channeltype> can be either "file", "xterm", "tcp", "fd", or "tty"
        (without quotes).

          A) To send/receive characters from a pair of files, use a file
             channel:

               channel=file:<rxfile>,<txfile>

          B) To create an interactive terminal window, use an xterm channel:

               channel=xterm:[<xterm_arg>]*

          C) To create a bidirectional tcp socket which one could, for example,
             access via telnet, use a tcp channel:

               channel=tcp:<port number>

          D) To cause the UART to read/write from existing numeric file
             descriptors, use an fd channel:

               channel=fd:<rx file descriptor num>,<tx file descriptor num>

          E) To connect the UART to a physical serial port, create a tty
             channel:

               channel=tty:device=/dev/ttyS0,baud=9600

     irq = <value>
        irq number for this device

     16550 = 0/1
        '0': this device is a UART16450
        '1': this device is a UART16550

     jitter = <value>
        in msecs... time to block, -1 to disable it

     vapi_id = <hex_value>
        VAPI id of this instance
*/

section uart
  enabled = 1
  baseaddr = 0x90000000
  irq = 2
  /* channel = "file:uart0.rx,uart0.tx" */
  channel = "tcp:10084"
  /* channel = "xterm:" */
  jitter = -1                     /* async behaviour */
  16550 = 1
end


/* DMA SECTION

   This section configures the DMAs

     enabled = <0|1>
        Enable/disable the peripheral.  By default if it is enabled.

     baseaddr = <hex_value>
        address of first DMA register for this device

     irq = <value>
        irq number for this device

     vapi_id = <hex_value>
        VAPI id of this instance
*/

section dma
  enabled = 1
  baseaddr = 0x9a000000
  irq = 11
end


/* ETHERNET SECTION

   This section configures the ETHERNETs

     enabled = <0|1>
        Enable/disable the peripheral.  By default if it is enabled.

     baseaddr = <hex_value>
        address of first ethernet register for this device

     dma = <value>
        which controller is this ethernet "connected" to

     irq = <value>
        ethernet mac IRQ level

     rtx_type = <value>
        use 0 - file interface, 1 - socket interface

     rx_channel = <value>
        DMA channel used for RX

     tx_channel = <value>
        DMA channel used for TX

     rxfile = "<filename>"
        filename, where to read data from

     txfile = "<filename>"
        filename, where to write data to

     sockif = "<ifacename>"
        interface name of ethernet socket

     vapi_id = <hex_value>
        VAPI id of this instance
*/

section ethernet
  enabled = 1
  baseaddr = 0x92000000
  /* dma = 0 */
  irq = 4
  rtx_type = 0
  /* tx_channel = 0 */
  /* rx_channel = 1 */
  rxfile = "eth0.rx"
  txfile = "eth0.tx"
  sockif = "eth0"
end


/* GPIO SECTION

   This section configures the GPIOs

     enabled = <0|1>
        Enable/disable the peripheral.  By default if it is enabled.

     baseaddr = <hex_value>
        address of first GPIO register for this device

     irq = <value>
        irq number for this device

     base_vapi_id = <hex_value>
        first VAPI id of this instance
        GPIO uses 8 consecutive VAPI IDs
*/

section gpio
  enabled = 0
  baseaddr = 0x91000000
  irq = 3
  base_vapi_id = 0x0200
end

/* VGA SECTION
   
    This section configures the VGA/LCD controller
   
      enabled = <0|1>
        Enable/disable the peripheral.  By default if it is enabled.

      baseaddr = <hex_value>
        address of first VGA register
       
      irq = <value>
        irq number for this device
       
      refresh_rate = <value>
        number of cycles between screen dumps
       
      filename = "<filename>"
        template name for generated names (e.g. "primary" produces "primary0023.bmp")
*/

section vga
  enabled = 1
  baseaddr = 0x97100000
  irq = 8
  refresh_rate = 100000
  filename = "primary"
end


/* TICK TIMER SECTION

    This section configures tick timer

    enabled = 0/1
      whether tick timer is enabled
*/

section pic
  enabled = 1
  edge_trigger = 1
end

/* FB SECTION
   
    This section configures the frame buffer
   
    enabled = <0|1>
      Enable/disable the peripheral.  By default if it is enabled.

    baseaddr = <hex_value>
      base address of frame buffer
       
    paladdr = <hex_value>
      base address of first palette entry
       
    refresh_rate = <value>
      number of cycles between screen dumps
       
    filename = "<filename>"
      template name for generated names (e.g. "primary" produces "primary0023.bmp")
*/

section fb
  enabled = 1
  baseaddr = 0x97000000
  refresh_rate = 1000000
  filename = "primary"
end


/* KBD SECTION

    This section configures the PS/2 compatible keyboard
   
    baseaddr = <hex_value>
      base address of the keyboard device
     
    rxfile = "<filename>"
      filename, where to read data from
*/

section kbd
  enabled = 1
  irq = 5
  baseaddr = 0x94000000
  rxfile = "kbd.rx"
end


/* ATA SECTION
   
    This section configures the ATA/ATAPI host controller
   
      baseaddr = <hex_value>
        address of first ATA register
       
      enabled = <0|1>
        Enable/disable the peripheral.  By default if it is enabled.

      irq = <value>
        irq number for this device

      debug = <value>
        debug level for ata models.
        0: no debug messages
        1: verbose messages
        3: normal messages (more messages than verbose)
        5: debug messages (normal debug messages)
        7: flow control messages (debug statemachine flows)
        9: low priority message (display everything the code does)

      dev_type0/1 = <value>
        ata device 0 type
        0: NO_CONNeCT: none (not connected)
        1: FILE      : simulated harddisk
        2: LOCAL     : local system harddisk

      dev_file0/1 = "<filename>"
        filename for simulated ATA device
        valid only if dev_type0 == 1

      dev_size0/1 = <value>
        size of simulated hard-disk (in MBytes)
        valid only if dev_type0 == 1

      dev_packet0/1 = <value>
        0: simulated ATA device does NOT implement PACKET command feature set
        1: simulated ATA device does implement PACKET command feature set

   FIXME: irq number
*/

section ata
  enabled = 0
  baseaddr = 0x9e000000
  irq = 15

end




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