or1ksim 's question

[yueng]

I change the sim.cfg , mem read and write both delay 1.
i run jpeg decode in the or1ksim
the result is
310,200,242 cycles, 171,816,396 instructions
compare with arm7 it use only 56,000,000 cycle, and 40,000,000 instructions

i remember that i read or1ksim is about 90% cycle accurate somewhere,
same jpeg decode C code ,why or1ksim use so many instructions? and so many cycles.


thank you

[Dimitri?s Orfanos]

There are many answers for these questions.
1)If you load the linux kernel on or1ksim and on the linux kernel you
run the program then of course you have more
instructions because the simulator runs and the linux kernel.
2)The openrisc compiler produces code with many NOPs in the brand delay
slots. A better compiler (I haven't try to use the optimization switches
to say the truth , I mean to use the switch -o1 ,-o2 ,etc) could put in
the delay slots more useful code not NOPs.
3)Does the simulator stops automatically the simulation or you have to
press Ctrl-C? The "exit" function that the compiler uses by default puts
the processor (here the simulator) to infinite loop(by executing NOPs)
after the normal execution of the program. So if you want to stop the
program you press Ctrl-C ,but you are not faster than the computer so
many NOPs  came again in your code.
You can check the code that was executed by seeing the file
"executed.log" that is produced from the simulator if you set the
exec_log (or exe_log , I don't remember actually) from the sim.cfg to 1.
That's all I have to say. Hope this helps.

yueng wrote:

> I change the sim.cfg , mem read and write both delay 1.
> i run jpeg decode in the or1ksim
> the result is
> 310,200,242 cycles, 171,816,396 instructions
> compare with arm7 it use only 56,000,000 cycle, and 40,000,000 instructions
>
> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> same jpeg decode C code ,why or1ksim use so many instructions? and so many
> cycles.
>
>
> thank you
>  

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Dimitri?s Orfanos]

Oh, and something else. I am not a maintainer of this project but I've
involved because of my university has put me an assignment(actually a
master thesis). So by reading the code of the or1ksim0.2.0 I have
concluded that there is no good measuring of cycles so I've done
something else. I've set on my own some CPI(clocks per instruction) and
with little scripting I can see which commands are executed (from the
executed.log) and how many times these commands are executed and I
calculate the total cycles of my own. For example I've set that the
"l.and" command uses 1 cycle if with my little script sees that there
are 3 "l.and" I measure 3*1 total cycles. The simulator uses a scheduler
which every n cycles tries to communicate with virtual devices that are
defined in the sim.cfg like keyboard, uart, etc . These cycles are also
added in the simulation cycles, so there is not so accurate. If you want
to use the simulator for cycle counting do something similar with me
make a little script and count the commands from the executed.log . If
you just want to use the simulator to run programs then you don't need
to count cycles.
DO

yueng wrote:

> I change the sim.cfg , mem read and write both delay 1.
> i run jpeg decode in the or1ksim
> the result is
> 310,200,242 cycles, 171,816,396 instructions
> compare with arm7 it use only 56,000,000 cycle, and 40,000,000 instructions
>
> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> same jpeg decode C code ,why or1ksim use so many instructions? and so many
> cycles.
>
>
> thank you
>  

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Pier Francesco Maria Santi]

Hi everybody.
Anyone have a Windows complete toolchain for OPENRISC?

yueng ha scritto:

> I change the sim.cfg , mem read and write both delay 1.
> i run jpeg decode in the or1ksim
> the result is
> 310,200,242 cycles, 171,816,396 instructions
> compare with arm7 it use only 56,000,000 cycle, and 40,000,000 instructions
>
> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> same jpeg decode C code ,why or1ksim use so many instructions? and so many
> cycles.
>
>
> thank you
>  

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Dimitri?s Orfanos]

On Monday 18 February 2008 15:30:54 Pier Francesco Maria Santi wrote:

> Hi everybody.
> Anyone have a Windows complete toolchain for OPENRISC?
>
> yueng ha scritto:
> > I change the sim.cfg , mem read and write both delay 1.
> > i run jpeg decode in the or1ksim
> > the result is
> > 310,200,242 cycles, 171,816,396 instructions
> > compare with arm7 it use only 56,000,000 cycle, and 40,000,000
> > instructions
> >
> > i remember that i read or1ksim is about 90% cycle accurate somewhere,
> > same jpeg decode C code ,why or1ksim use so many instructions? and so
> > many cycles.
> >
> >
> > thank you
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc

you can use cygwin
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[yueng]

thanks

i just want to compare or1k's perfomance with arm7 or arm9, so i use some
algorithm ,for example
jpeg decode run both on or1k and arm. to see which one use less cycles.
and my result is or1ksim use 300M cycle and 200M instruction to finish a
320x240 jpegdecode  compared
with arm7 50M cycle and 40M instruction.



Dimitri?s Orfanos wrote:

>
> Oh, and something else. I am not a maintainer of this project but I've
> involved because of my university has put me an assignment(actually a
> master thesis). So by reading the code of the or1ksim0.2.0 I have
> concluded that there is no good measuring of cycles so I've done
> something else. I've set on my own some CPI(clocks per instruction) and
> with little scripting I can see which commands are executed (from the
> executed.log) and how many times these commands are executed and I
> calculate the total cycles of my own. For example I've set that the
> "l.and" command uses 1 cycle if with my little script sees that there
> are 3 "l.and" I measure 3*1 total cycles. The simulator uses a scheduler
> which every n cycles tries to communicate with virtual devices that are
> defined in the sim.cfg like keyboard, uart, etc . These cycles are also
> added in the simulation cycles, so there is not so accurate. If you want
> to use the simulator for cycle counting do something similar with me
> make a little script and count the commands from the executed.log . If
> you just want to use the simulator to run programs then you don't need
> to count cycles.
> DO
>
> yueng wrote:
>> I change the sim.cfg , mem read and write both delay 1.
>> i run jpeg decode in the or1ksim
>> the result is
>> 310,200,242 cycles, 171,816,396 instructions
>> compare with arm7 it use only 56,000,000 cycle, and 40,000,000
>> instructions
>>
>> i remember that i read or1ksim is about 90% cycle accurate somewhere,
>> same jpeg decode C code ,why or1ksim use so many instructions? and so
>> many
>> cycles.
>>
>>
>> thank you
>>  
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
>

--
View this message in context: http://www.nabble.com/or1ksim-%27s-question-tp15540185p15582468.html
Sent from the OpenCores - RISC mailing list archive at Nabble.com.

_______________________________________________
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[yueng]

thank you.

i just compile the c files to make a jpeg.or32
and sim -i jpeg.or32. dosn't load linux kernel.
i set a break point at the end of program. then run until it meet the breakpoint .to see how many cycles the algorithm used.

yes,there are many nops instrustion in the simulation.  and i try the optimization -o1 -o2 switch,
the result is the same ,seemed -o1 or -o2  is not changing anything.

i test or1k's perfomance with arm7 or arm9, so i use some algorithm ,for example
jpeg decode run both on or1k and arm. to see which one use less cycles.
and my result is or1ksim use 300M cycle and 200M instruction to finish a 320x240 jpegdecode  compared
with arm7 50M cycle and 40M instruction.

next will try the algorithm on the verilog simulation ,to see if has a better performance--use less cycle.

Dimitri?s Orfanos wrote:

There are many answers for these questions.
1)If you load the linux kernel on or1ksim and on the linux kernel you
run the program then of course you have more
instructions because the simulator runs and the linux kernel.
2)The openrisc compiler produces code with many NOPs in the brand delay
slots. A better compiler (I haven't try to use the optimization switches
to say the truth , I mean to use the switch -o1 ,-o2 ,etc) could put in
the delay slots more useful code not NOPs.
3)Does the simulator stops automatically the simulation or you have to
press Ctrl-C? The "exit" function that the compiler uses by default puts
the processor (here the simulator) to infinite loop(by executing NOPs)
after the normal execution of the program. So if you want to stop the
program you press Ctrl-C ,but you are not faster than the computer so
many NOPs  came again in your code.
You can check the code that was executed by seeing the file
"executed.log" that is produced from the simulator if you set the
exec_log (or exe_log , I don't remember actually) from the sim.cfg to 1.
That's all I have to say. Hope this helps.

[yueng]

    we are a little same , my assignment is to compare or1200 ,arm7,arm9 's performance and toolchain.
and i study electronic engineering ,but not familiar with CPU and linux .

where is the executed.log ,i didn't find the file.and would mind mail me the scripts you used to count instrunctions to [e-mail],thank you very much.

  or1ksim use about 4 times cylces compare to arm7,it is an unecceptable slow result. i guess because the or1ksim is not a cycle accurate simulator,and don't simulate the 5 stage pipeline ,so it instert many nops. i think, so if i use verilog simulate the nops instruntion maybe fewer , then the cycle used is fewer . I just guess so ,and will test verilog simulation soon.

Dimitri?s Orfanos wrote:

Oh, and something else. I am not a maintainer of this project but I've
involved because of my university has put me an assignment(actually a
master thesis). So by reading the code of the or1ksim0.2.0 I have
concluded that there is no good measuring of cycles so I've done
something else. I've set on my own some CPI(clocks per instruction) and
with little scripting I can see which commands are executed (from the
executed.log) and how many times these commands are executed and I
calculate the total cycles of my own. For example I've set that the
"l.and" command uses 1 cycle if with my little script sees that there
are 3 "l.and" I measure 3*1 total cycles. The simulator uses a scheduler
which every n cycles tries to communicate with virtual devices that are
defined in the sim.cfg like keyboard, uart, etc . These cycles are also
added in the simulation cycles, so there is not so accurate. If you want
to use the simulator for cycle counting do something similar with me
make a little script and count the commands from the executed.log . If
you just want to use the simulator to run programs then you don't need
to count cycles.
DO

yueng wrote:
> I change the sim.cfg , mem read and write both delay 1.
> i run jpeg decode in the or1ksim
> the result is
> 310,200,242 cycles, 171,816,396 instructions
> compare with arm7 it use only 56,000,000 cycle, and 40,000,000 instructions
>
> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> same jpeg decode C code ,why or1ksim use so many instructions? and so many
> cycles.
>
>
> thank you
>  
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Rahul Wagh]

Hi,

As you might have seen, when we say printf("....") in a OR1k testcase
written in C, it calls the printf routine written in support.c file. That
does not give the actual printing of the message within "..." though.
Anybody has tried that in OR1k ? Any suggestions / pointers ?

At my end, I figured out that the GPR R3 gets the starting address of the
memory location where the message in printf is stored. Using that, I wrote a
small code in verilog monitor (or1200_monitor.v) to access the memory (till
you get an ASCII equivalent of NULL or something like that) and display the
things in %c format to get the message. However, this helps only for
'pure-text' type messages. It does not work for messages like the following
:

printf("Register value = %x",reg_value);

Can anybody throw some light on how to do this ? (How does one track the
location of the arguments passed to the printf statement ? etc..)

Thanks,

Rahul.

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Dimitri?s Orfanos]

On Wednesday 20 February 2008 07:09:31 yueng wrote:

> by the way, where is the executed.log? i didn't find the file at cur dir or
> in the or1ksim install dir.
>
> Dimitri?s Orfanos wrote:
> > There are many answers for these questions.
> > 1)If you load the linux kernel on or1ksim and on the linux kernel you
> > run the program then of course you have more
> > instructions because the simulator runs and the linux kernel.
> > 2)The openrisc compiler produces code with many NOPs in the brand delay
> > slots. A better compiler (I haven't try to use the optimization switches
> > to say the truth , I mean to use the switch -o1 ,-o2 ,etc) could put in
> > the delay slots more useful code not NOPs.
> > 3)Does the simulator stops automatically the simulation or you have to
> > press Ctrl-C? The "exit" function that the compiler uses by default puts
> > the processor (here the simulator) to infinite loop(by executing NOPs)
> > after the normal execution of the program. So if you want to stop the
> > program you press Ctrl-C ,but you are not faster than the computer so
> > many NOPs  came again in your code.
> > You can check the code that was executed by seeing the file
> > "executed.log" that is produced from the simulator if you set the
> > exec_log (or exe_log , I don't remember actually) from the sim.cfg to 1.
> > That's all I have to say. Hope this helps.
> >
> > yueng wrote:
> >> I change the sim.cfg , mem read and write both delay 1.
> >> i run jpeg decode in the or1ksim
> >> the result is
> >> 310,200,242 cycles, 171,816,396 instructions
> >> compare with arm7 it use only 56,000,000 cycle, and 40,000,000
> >> instructions
> >>
> >> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> >> same jpeg decode C code ,why or1ksim use so many instructions? and so
> >> many
> >> cycles.
> >>
> >>
> >> thank you
> >
> > _______________________________________________
> > http://www.opencores.org/mailman/listinfo/openrisc

Have you set the exe_log=1 in the sim.cfg?
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Matjaz Breskvar-5]

Hi Yeung,

The or1ksim cycles count is not very accurate, and even if you set the right
memory delays it is just a rough esstimation.

Having said that, the toolchain for OpenRISC is very unoptimized and the
OpenRISC itself is lacking in some areas. To improve all that the Beyond
Semiconductor was founded by the creators of OpenRISC. First we have
cosiderably optimized the OpenRISC RTL, and the result is Beyond BA12
processor, fully backwards compatible. Things that could not be improved due
to instruction set were addressed with Beyond BA22 which features the world
highest code density and has ~55% clock-for-clock performance increase
comparing to OpenRISC (with optimized toolchain).

Another interesting product is BA14 processor, an out-of-order dual issue
processor, which offers ~10x performance comparing to OpenRISC.

Currently we are in discussion how to offer all this developments to
comunity in a way not to disturb the founding such development requires.
Hopefully things get wrapped up soon.

For more info on OpenRISC compatible processors (in the sense that only
sofware recompile is needed) and peripherals you may visit our website at:

        http://www.beyondsemi.com/

Yeung, please feel free to contact me, if you'd like to evaluate performance
of our processors with optimized toolchains against ARM. Te results will be
much more favorable.

best regards,
matjaz.



* yueng (penguin00@...) wrote:

>
> thanks
>
> i just want to compare or1k's perfomance with arm7 or arm9, so i use some
> algorithm ,for example
> jpeg decode run both on or1k and arm. to see which one use less cycles.
> and my result is or1ksim use 300M cycle and 200M instruction to finish a
> 320x240 jpegdecode  compared
> with arm7 50M cycle and 40M instruction.
>
>
>
> Dimitri?s Orfanos wrote:
> >
> > Oh, and something else. I am not a maintainer of this project but I've
> > involved because of my university has put me an assignment(actually a
> > master thesis). So by reading the code of the or1ksim0.2.0 I have
> > concluded that there is no good measuring of cycles so I've done
> > something else. I've set on my own some CPI(clocks per instruction) and
> > with little scripting I can see which commands are executed (from the
> > executed.log) and how many times these commands are executed and I
> > calculate the total cycles of my own. For example I've set that the
> > "l.and" command uses 1 cycle if with my little script sees that there
> > are 3 "l.and" I measure 3*1 total cycles. The simulator uses a scheduler
> > which every n cycles tries to communicate with virtual devices that are
> > defined in the sim.cfg like keyboard, uart, etc . These cycles are also
> > added in the simulation cycles, so there is not so accurate. If you want
> > to use the simulator for cycle counting do something similar with me
> > make a little script and count the commands from the executed.log . If
> > you just want to use the simulator to run programs then you don't need
> > to count cycles.
> > DO
> >
> > yueng wrote:
> >> I change the sim.cfg , mem read and write both delay 1.
> >> i run jpeg decode in the or1ksim
> >> the result is
> >> 310,200,242 cycles, 171,816,396 instructions
> >> compare with arm7 it use only 56,000,000 cycle, and 40,000,000
> >> instructions
> >>
> >> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> >> same jpeg decode C code ,why or1ksim use so many instructions? and so
> >> many
> >> cycles.
> >>
> >>
> >> thank you
> >>  
> > _______________________________________________
> > http://www.opencores.org/mailman/listinfo/openrisc
> >
> >
>
> --
> View this message in context: http://www.nabble.com/or1ksim-%27s-question-tp15540185p15582468.html
> Sent from the OpenCores - RISC mailing list archive at Nabble.com.
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[yueng]

i don't figure out the printf either.
so i delete all printf in my code...

Rahul Wagh wrote:

Hi,

As you might have seen, when we say printf("....") in a OR1k testcase
written in C, it calls the printf routine written in support.c file. That
does not give the actual printing of the message within "..." though.
Anybody has tried that in OR1k ? Any suggestions / pointers ?

At my end, I figured out that the GPR R3 gets the starting address of the
memory location where the message in printf is stored. Using that, I wrote a
small code in verilog monitor (or1200_monitor.v) to access the memory (till
you get an ASCII equivalent of NULL or something like that) and display the
things in %c format to get the message. However, this helps only for
'pure-text' type messages. It does not work for messages like the following
:

printf("Register value = %x",reg_value);

Can anybody throw some light on how to do this ? (How does one track the
location of the arguments passed to the printf statement ? etc..)

Thanks,

Rahul.

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[yueng]

thanks
the CPU core you mentioned BA22 /BA14 is opensource free or commercial?

best regard
yeung

Matjaz Breskvar-5 wrote:

Hi Yeung,
The or1ksim cycles count is not very accurate, and even if you set the right
memory delays it is just a rough esstimation.
Having said that, the toolchain for OpenRISC is very unoptimized and the
OpenRISC itself is lacking in some areas. To improve all that the Beyond
Semiconductor was founded by the creators of OpenRISC. First we have
cosiderably optimized the OpenRISC RTL, and the result is Beyond BA12
processor, fully backwards compatible. Things that could not be improved due
to instruction set were addressed with Beyond BA22 which features the world
highest code density and has ~55% clock-for-clock performance increase
comparing to OpenRISC (with optimized toolchain).

Another interesting product is BA14 processor, an out-of-order dual issue
processor, which offers ~10x performance comparing to OpenRISC.

Currently we are in discussion how to offer all this developments to
comunity in a way not to disturb the founding such development requires.
Hopefully things get wrapped up soon.

For more info on OpenRISC compatible processors (in the sense that only
sofware recompile is needed) and peripherals you may visit our website at:

        http://www.beyondsemi.com/

Yeung, please feel free to contact me, if you'd like to evaluate performance
of our processors with optimized toolchains against ARM. Te results will be
much more favorable.

best regards,
matjaz.



* yueng ([e-mail]) wrote:
>
> thanks
>
> i just want to compare or1k's perfomance with arm7 or arm9, so i use some
> algorithm ,for example
> jpeg decode run both on or1k and arm. to see which one use less cycles.
> and my result is or1ksim use 300M cycle and 200M instruction to finish a
> 320x240 jpegdecode  compared
> with arm7 50M cycle and 40M instruction.
>
>
>
> Dimitri?s Orfanos wrote:
> >
> > Oh, and something else. I am not a maintainer of this project but I've
> > involved because of my university has put me an assignment(actually a
> > master thesis). So by reading the code of the or1ksim0.2.0 I have
> > concluded that there is no good measuring of cycles so I've done
> > something else. I've set on my own some CPI(clocks per instruction) and
> > with little scripting I can see which commands are executed (from the
> > executed.log) and how many times these commands are executed and I
> > calculate the total cycles of my own. For example I've set that the
> > "l.and" command uses 1 cycle if with my little script sees that there
> > are 3 "l.and" I measure 3*1 total cycles. The simulator uses a scheduler
> > which every n cycles tries to communicate with virtual devices that are
> > defined in the sim.cfg like keyboard, uart, etc . These cycles are also
> > added in the simulation cycles, so there is not so accurate. If you want
> > to use the simulator for cycle counting do something similar with me
> > make a little script and count the commands from the executed.log . If
> > you just want to use the simulator to run programs then you don't need
> > to count cycles.
> > DO
> >
> > yueng wrote:
> >> I change the sim.cfg , mem read and write both delay 1.
> >> i run jpeg decode in the or1ksim
> >> the result is
> >> 310,200,242 cycles, 171,816,396 instructions
> >> compare with arm7 it use only 56,000,000 cycle, and 40,000,000
> >> instructions
> >>
> >> i remember that i read or1ksim is about 90% cycle accurate somewhere,
> >> same jpeg decode C code ,why or1ksim use so many instructions? and so
> >> many
> >> cycles.
> >>
> >>
> >> thank you
> >>  
> > _______________________________________________
> > http://www.opencores.org/mailman/listinfo/openrisc
> >
> >
>
> --
> View this message in context: http://www.nabble.com/or1ksim-%27s-question-tp15540185p15582468.html
> Sent from the OpenCores - RISC mailing list archive at Nabble.com.
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[duca]

Hi,

     Maybe this helps:
www.da.isy.liu.se/courses/tsea02
lab0-4
hw_sw\lab0-4\hw\monitor\firmware\src\printf.c
   Copyright 2001, 2002 Georges Menie (www.menie.org)

Regards,
Laurentiu Duca
http://prof.cs.pub.ro/~duca

Quoting Rahul Wagh <rahul.wagh@...>:

> Hi,
>
> As you might have seen, when we say printf("....") in a OR1k testcase
> written in C, it calls the printf routine written in support.c file. That
> does not give the actual printing of the message within "..." though.
> Anybody has tried that in OR1k ? Any suggestions / pointers ?
>
> At my end, I figured out that the GPR R3 gets the starting address of the
> memory location where the message in printf is stored. Using that, I wrote a
> small code in verilog monitor (or1200_monitor.v) to access the memory (till
> you get an ASCII equivalent of NULL or something like that) and display the
> things in %c format to get the message. However, this helps only for
> 'pure-text' type messages. It does not work for messages like the following
> :
>
> printf("Register value = %x",reg_value);
>
> Can anybody throw some light on how to do this ? (How does one track the
> location of the arguments passed to the printf statement ? etc..)
>
> Thanks,
>
> Rahul.
>
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/openrisc
>
> --
> This message has been scanned for viruses and
> dangerous content by MailScanner, and is
> believed to be clean.
>
>

--


--
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.

_______________________________________________
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[duca]

Hi,

     Maybe this helps:
http://www.nabble.com/Re:-how-to-run-gcc-compiler-independently-for-generation%09machine-code-for-or1k-td14948162.html

http://www.meansoffreedom.org/opencores.html
http://www.eecg.utoronto.ca/~jarvin/or32/
http://www.asisi.co.uk/openrisc
http://www.opencores.org/projects.cgi/web/or1k/gnu_toolchain_port
http://www.opencores.org/projects.cgi/web/or1k/architectural_simulator

     I have ported lab1 from
www.da.isy.liu.se/courses/tsea02
to Digilent Nexys Board.


Regards,
Laurentiu-Cristian Duca
http://prof.cs.pub.ro/~duca


Quoting Pier Francesco Maria Santi <pfm.santi@...>:

> Hi everybody.
> Anyone have a Windows complete toolchain for OPENRISC?
>
> yueng ha scritto:
>> I change the sim.cfg , mem read and write both delay 1.
>> i run jpeg decode in the or1ksim
>> the result is 310,200,242 cycles, 171,816,396 instructions
>> compare with arm7 it use only 56,000,000 cycle, and 40,000,000 instructions
>>
>> i remember that i read or1ksim is about 90% cycle accurate somewhere,
>> same jpeg decode C code ,why or1ksim use so many instructions? and so many
>> cycles.
>>
>>
>> thank you
>>
>
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[rich_daddio]

Hi,
I am not sure if this is what you are looking for but take a look at
OpenRISC 1000 Architecture Manual under "Function Calling Sequence"
and the table of registers, and that might help you.

http://www.opencores.org/cvsweb.shtml/or1k/docs/openrisc_arch.pdf


HTH & Best Regards,

Rich d
----- Original Message -----
From: Rahul Wagh<rahul.wagh@m...>
To:
Date: Wed Feb 20 09:14:25 CET 2008
Subject: [openrisc] Printf using OR1K C test and verilog.

> Hi,
>
> As you might have seen, when we say printf("....") in a
> OR1k testcase
> written in C, it calls the printf routine written in support.c
> file. That
> does not give the actual printing of the message within
> "..." though.
> Anybody has tried that in OR1k ? Any suggestions / pointers ?
> At my end, I figured out that the GPR R3 gets the starting address
> of the
> memory location where the message in printf is stored. Using that,
> I wrote a
> small code in verilog monitor (or1200_monitor.v) to access the
> memory (till
> you get an ASCII equivalent of NULL or something like that) and
> display the
> things in %c format to get the message. However, this helps only
> for
> 'pure-text' type messages. It does not work for messages like the
> following
> :
> printf("Register value = %x",reg_value);
> Can anybody throw some light on how to do this ? (How does one
> track the
> location of the arguments passed to the printf statement ? etc..)
> Thanks,
> Rahul.
>
>

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

[Rahul Wagh]

Hi Rich,

Thanks for your inputs. Well, I have already looked into the section that you have mentioned. I tried to use the frame-pointer, stack-pointer related info given there to trace the arguments. But I did not get any success. I figured out that once you say something like : <printf("A = %d",a_value);> , the 'a_value' first gets stored in GPR R3. You can see this in the GPR dump created by or1200_monitor.v. However, when the actual call to the printf in support.c happens, the R3 gets overwritten. After that, I do not have a clue as to where does the argument 'a_value' go. That’s where I am stuck as of now.

Thanks,

Rahul.

-----Original Message-----
From: openrisc-bounces@... [mailto:openrisc-bounces@...] On Behalf Of rich_daddio@...
Sent: 22 फरवरी 2008 05:01
To: openrisc@...
Subject: Re: [openrisc] Printf using OR1K C test and verilog.

Hi,
I am not sure if this is what you are looking for but take a look at
OpenRISC 1000 Architecture Manual under "Function Calling Sequence"
and the table of registers, and that might help you.

http://www.opencores.org/cvsweb.shtml/or1k/docs/openrisc_arch.pdf


HTH & Best Regards,

Rich d
----- Original Message -----
From: Rahul Wagh<rahul.wagh@m...>
To:
Date: Wed Feb 20 09:14:25 CET 2008
Subject: [openrisc] Printf using OR1K C test and verilog.

> Hi,
>
> As you might have seen, when we say printf("....") in a
> OR1k testcase
> written in C, it calls the printf routine written in support.c
> file. That
> does not give the actual printing of the message within
> "..." though.
> Anybody has tried that in OR1k ? Any suggestions / pointers ?
> At my end, I figured out that the GPR R3 gets the starting address
> of the
> memory location where the message in printf is stored. Using that,
> I wrote a
> small code in verilog monitor (or1200_monitor.v) to access the
> memory (till
> you get an ASCII equivalent of NULL or something like that) and
> display the
> things in %c format to get the message. However, this helps only
> for
> 'pure-text' type messages. It does not work for messages like the
> following
> :
> printf("Register value = %x",reg_value);
> Can anybody throw some light on how to do this ? (How does one
> track the
> location of the arguments passed to the printf statement ? etc..)
> Thanks,
> Rahul.
>
>

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc

_______________________________________________
http://www.opencores.org/mailman/listinfo/openrisc