use functions to create rules

[ogronom]

Hi all,

I'm having troubles at using make-functions to create make-rules. I find
info pages quite confusing about this.

Here is the sample code, that is demonstrates the idea

# --------BEGIN
tests_SRC=1.c 2.c
tests=$(tests_SRC:.c=.out))

define out_template =
$(DEST_DIR)/$$($(1):.c=.out) : $(1)
        echo $$@ $(1)
endef

$(eval $(call $(out_template 1.c)))
$(eval $(call $(out_template 2.c)))

all: $(tests)

check: $(tests)
        for f in $(tests) ; do ./$$f ; done
#---------END

Usual respond is

make: *** No rule to make target `1.out', needed by `all'.  Stop.

How can I make the things right?

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[Paul Smith-20]

On Mon, 2012-06-11 at 23:53 -0400, ogronom wrote:

> # --------BEGIN
> tests_SRC=1.c 2.c
> tests=$(tests_SRC:.c=.out))
>
> define out_template =
> $(DEST_DIR)/$$($(1):.c=.out) : $(1)
> echo $$@ $(1)
> endef
>
> $(eval $(call $(out_template 1.c)))
> $(eval $(call $(out_template 2.c)))
>
> all: $(tests)
>
> check: $(tests)
> for f in $(tests) ; do ./$$f ; done
> #---------END

First, you should put "all" closer to the top.  It should be the first
target defined.

> make: *** No rule to make target `1.out', needed by `all'.  Stop.

Your invocation of the $(call ...) function is wrong, first of all.  It
should be:

    $(eval $(call out_template,1.c))
    $(eval $(call out_template,2.c))

The first argument to the call function is expanded and the expansion is
treated as the name of a variable to be used as the user-defined
function.  The remaining arguments are used to replace $1, $2, etc.

In your case, where you write $(call $(out_template 1.c)), make
evaluates the reference $(out_template 1.c); since there's no variable
by that name it evaluates to empty, which means you're invoking $(eval )
(on the empty string) and nothing is being defined.

If you replace $(eval ...) with $(info ...) you'll see what make is
evaluating; that can be a useful debugging tool.  Running make with
--warn-undefined-variables would have also helped, but note that gives a
lot of false positives as well.


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[ogronom]

Thanks, Paul. It really helped, but there is still a strange issue.

################################################# BEGIN
tests_SRC=1.c 2.c
tests=$(tests_SRC:.c=.out))

all: $(tests)

define out_template =
$(subst .c,.out,$(1)) : $(1)
        echo $$@ $(1)

endef

$(eval $(call out_template,1.c))

$(eval $(call out_template,2.c))


check: $(tests)
        for f in $(tests) ; do echo ./$$f ; done
################################################ END

This variant produces the following message:

echo 1.out 1.c
1.out 1.c
make: *** No rule to make target `2.out)', needed by `all'.  Stop.

To me it looks like 1.out target is created but 2.out is not, although
the call of the function is identical.

Paul Smith wrote:

> On Mon, 2012-06-11 at 23:53 -0400, ogronom wrote:
>> # --------BEGIN
>> tests_SRC=1.c 2.c
>> tests=$(tests_SRC:.c=.out))
>>
>> define out_template =
>> $(DEST_DIR)/$$($(1):.c=.out) : $(1)
>> echo $$@ $(1)
>> endef
>>
>> $(eval $(call $(out_template 1.c)))
>> $(eval $(call $(out_template 2.c)))
>>
>> all: $(tests)
>>
>> check: $(tests)
>> for f in $(tests) ; do ./$$f ; done
>> #---------END
>
> First, you should put "all" closer to the top.  It should be the first
> target defined.
>
>> make: *** No rule to make target `1.out', needed by `all'.  Stop.
>
> Your invocation of the $(call ...) function is wrong, first of all.  It
> should be:
>
>     $(eval $(call out_template,1.c))
>     $(eval $(call out_template,2.c))
>
> The first argument to the call function is expanded and the expansion is
> treated as the name of a variable to be used as the user-defined
> function.  The remaining arguments are used to replace $1, $2, etc.
>
> In your case, where you write $(call $(out_template 1.c)), make
> evaluates the reference $(out_template 1.c); since there's no variable
> by that name it evaluates to empty, which means you're invoking $(eval )
> (on the empty string) and nothing is being defined.
>
> If you replace $(eval ...) with $(info ...) you'll see what make is
> evaluating; that can be a useful debugging tool.  Running make with
> --warn-undefined-variables would have also helped, but note that gives a
> lot of false positives as well.
>

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[ogronom]

Thanks :(
So much time wasted.

Stefano Lattarini wrote:

> On 06/12/2012 03:13 PM, ogronom wrote:
>> Thanks, Paul. It really helped, but there is still a strange issue.
>>
>> ################################################# BEGIN
>> tests_SRC=1.c 2.c
>> tests=$(tests_SRC:.c=.out))
>>
> Extra trailing ')' here.
>
> HTH,
>   Stefano

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[Stefano Lattarini]

On 06/12/2012 03:13 PM, ogronom wrote:
> Thanks, Paul. It really helped, but there is still a strange issue.
>
> ################################################# BEGIN
> tests_SRC=1.c 2.c
> tests=$(tests_SRC:.c=.out))
>
Extra trailing ')' here.

HTH,
  Stefano

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